74HC157现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

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产品型号74HC157的概述

芯片74HC157的概述与详细参数一、芯片概述 74HC157是一种高速度的CMOS四选一模拟开关（Multiplexer）。它是74HC系列中的一部分，广泛应用于数字电路中进行多路选择与切换。该芯片可以通过控制引脚选择输入信号，并输出所选择的信号。其工作电压范围广，适合多种电子设备的需求。 74HC157具有低功耗、高噪声容忍度等优点，尤其适合需要快速开关和减少信号延迟的应用场合。该芯片可以在TTL电压（如5V）下工作，并具有极高的集成度，能够有效缩小电路空间。二、详细参数以下是74HC157的详细技术参数，概述了该芯片的工作特性和电气性能： - 逻辑功能：4:1多路复用器 - 供电电压范围：2V至6V - 输入高电平电压（VIH）： 0.7Vcc - 输入低电平电压（VIL）： 0.3Vcc - 输出高电平电压（VOH）： 0.9Vcc（适用于负载电流≤ 0.5 mA） -...

产品型号74HC157的Datasheet PDF文件预览

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT157

Quad 2-input multiplexer

December 1990

Product speciﬁcation

File under Integrated Circuits, IC06

Philips Semiconductors

Product speciﬁcation

Quad 2-input multiplexer

74HC/HCT157

Moving the data from two groups of registers to four

common output buses is a common use of the “157”. The

state of the common data select input (S) determines the

particular register from which the data comes. It can also

be used as function generator.

FEATURES

• Non-inverting data path

• Output capability: standard

• I_CCcategory: MSI

The device is useful for implementing highly irregular logic

by generating any four of the 16 different functions of two

variables with one variable common.

GENERAL DESCRIPTION

The 74HC/HCT157 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The “157” is the logic implementation of a 4-pole,

2-position switch, where the position of the switch is

determined by the logic levels applied to S.

The logic equations are:

1Y = E.(1l₁.S + 1l₀.S)

2Y = E.(2l₁.S + 2l₀.S)

3Y = E.(3l₁.S + 3l₀.S)

4Y = E.(4l₁.S + 4l₀.S)

The 74HC/HCT157 are quad 2-input multiplexers which

select 4 bits of data from two sources under the control of

a common data select input (S). The four outputs present

the selected data in the true (non-inverted) form. The

enable input (E) is active LOW. When E is HIGH, all of the

outputs (1Y to 4Y) are forced LOW regardless of all other

input conditions.

The “157” is identical to the “158” but has non-inverting

(true) outputs.

QUICK REFERENCE DATA

GND = 0 V; T_amb= 25 °C; t_r= t_f= 6 ns

TYPICAL

SYMBOL

PARAMETER

propagation delay

CONDITIONS

UNIT

HCT

t_PHL/ t_PLH

C_L= 15 pF; V_CC= 5 V

nI₀, nI₁to nY

E to nY

3.5

S to nY

3.5

C_I

input capacitance

C_PD

power dissipation capacitance per multiplexer notes 1 and 2

Notes

1. C_PDis used to determine the dynamic power dissipation (P_Din µW):

P_D= C_PD× V_CC²× f_i+ ∑ (C_L× V_CC²× f_o) where:

f_i= input frequency in MHz

f_o= output frequency in MHz

∑ (C_L× V_CC²× f_o) = sum of outputs

C_L= output load capacitance in pF

V_CC= supply voltage in V

2. For HC the condition is V_I= GND to V_CC

For HCT the condition is V_I= GND to V_CC− 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

December 1990

Philips Semiconductors

Product speciﬁcation

Quad 2-input multiplexer

74HC/HCT157

PIN DESCRIPTION

PIN NO.

SYMBOL

NAME AND FUNCTION

common data select input

data inputs from source 0

data inputs from source 1

multiplexer outputs

2, 5, 11, 14

1I₀to 4I₀

1I₁to 4I₁

1Y to 4Y

GND

3, 6, 10, 13

4, 7, 9, 12

ground (0 V)

enable input (active LOW)

positive supply voltage

V_CC

Fig.1 Pin configuration.

Fig.2 Logic symbol.

Fig.3 IEC logic symbol.

December 1990

Philips Semiconductors

Product speciﬁcation

Quad 2-input multiplexer

74HC/HCT157

FUNCTION TABLE

INPUTS

nI₀

OUTPUT

nI₁

Notes

1. H = HIGH voltage level

L = LOW voltage level

X = don’t care

Fig.4 Functional diagram.

Fig.5 Logic diagram.

December 1990

Philips Semiconductors

Product speciﬁcation

Quad 2-input multiplexer

74HC/HCT157

DC CHARACTERISTICS FOR 74HC

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.

Output capability: standard

I_CCcategory: MSI

AC CHARACTERISTICS FOR 74HC

GND = 0 V; t_r= t_f= 6 ns; C_L= 50 pF

_amb(°C)

74HC

TEST CONDITIONS

SYMBOL PARAMETER

UNIT

V_CC

WAVEFORMS

(V)

+25

typ.

−40 to +85

−40 to +125

min.

max.

min.

max.

min.

max.

t_PHL/ t_PLHpropagation delay

nI₀to nY;

125

155

190

2.0

4.5

6.0

Fig.7

nI₁to nY

_PHL/ t_PLHpropagation delay

E to nY

115

145

175

2.0

4.5

6.0

Fig.6

_PHL/ t_PLHpropagation delay

S to nY

125

155

190

2.0

4.5

6.0

Fig.7

t_THL/ t_TLHoutput transition

time

110

2.0

4.5

6.0

Fig.6 and Fig.7

December 1990

Philips Semiconductors

Product speciﬁcation

Quad 2-input multiplexer

74HC/HCT157

DC CHARACTERISTICS FOR 74HCT

For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.

Output capability: standard

I_CCcategory: MSI

Note to HCT types

The value of additional quiescent supply current (∆I_CC) for a unit load of 1 is given in the family specifications.

To determine ∆I_CCper input, multiply this value by the unit load coefficient shown in the table below.

INPUT

UNIT LOAD COEFFICIENT

nI₀

nI₁

1.00

0.60

1.00

AC CHARACTERISTICS FOR 74HCT

GND = 0 V; t_r= t_f= 6 ns; C_L= 50 pF

T_amb(°C)

TEST CONDITIONS

74HCT

SYMBOL PARAMETER

min.

UNIT

WAVEFORMS

V_CC

(V)

+25

typ.

−40 to +85

−40 to +125

max.

min.

max.

min.

max.

t_PHL/ t_PLHpropagation delay

nI₀to nY;

4.5

Fig.7

nI₁to nY

_PHL/ t_PLHpropagation delay

E to nY

4.5

Fig.6

_PHL/ t_PLHpropagation delay

S to nY

Fig.7

_THL/ t_TLHoutput transition

time

Fig.6 and Fig.7

December 1990

Philips Semiconductors

Product speciﬁcation

Quad 2-input multiplexer

74HC/HCT157

AC WAVEFORMS

(1) HC : V_M= 50%; V_I= GND to V_CC

HCT: V_M= 1.3 V; V_I= GND to 3 V.

Fig.6 Waveforms showing the enable input (E) to output (nY) propagation delays and the output transition times.

(1) HC : V_M= 50%; V_I= GND to V_CC

HCT: V_M= 1.3 V; V_I= GND to 3 V.

Fig.7 Waveforms showing the data inputs (nI_n) and common data select input (S) to output (nY) propagation

delays.

PACKAGE OUTLINES

See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.

December 1990

74HC157相关文章

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74HC157BQ产品参数

型号:	74HC157BQ
是否Rohs认证：	符合
生命周期：	Transferred
IHS 制造商：	NXP SEMICONDUCTORS
零件包装代码：	QFN
包装说明：	3.50 X 2.50 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT763-1, VQFN-16
针数：	16
Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01
风险等级：	5.58
系列：	HC/UH
JESD-30 代码：	R-PQCC-N16
JESD-609代码：	e4
长度：	3.5 mm
逻辑集成电路类型：	MULTIPLEXER
湿度敏感等级：	1
功能数量：	4
输入次数：	2
输出次数：	1
端子数量：	16
最高工作温度：	125 °C
最低工作温度：	-40 °C
输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY
封装代码：	HVQCCN
封装形状：	RECTANGULAR
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260
传播延迟（tpd）：	38 ns
认证状态：	Not Qualified
座面最大高度：	1 mm
最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
技术：	CMOS
温度等级：	AUTOMOTIVE
端子面层：	NICKEL PALLADIUM GOLD
端子形式：	NO LEAD
端子节距：	0.5 mm
端子位置：	QUAD
处于峰值回流温度下的最长时间：	30
宽度：	2.5 mm
Base Number Matches：	1

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