74LCX245各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号74LCX245的概述

芯片74LCX245的概述 74LCX245是一款高性能的排列式双向总线收发器，属于74系列逻辑器件。该芯片的设计对于高速数据传输尤为重要，其电气特性和结构使得它非常适合用于各种数字系统中的总线扩展和数据管理。在众多逻辑功能之外，74LCX245不仅能在不同电平之间进行有效的信号转换，还具有优越的功耗特性，适合电池供电的便携设备。芯片74LCX245的详细参数 74LCX245主要参数包括： 1. 供电电压范围：2.0V至5.5V 2. 输入电压范围：-0.5V至7V 3. 输出电压范围：-0.5V至Vcc + 0.5V 4. 工作温度范围：-40°C至+125°C 5. 高电平输入范围：VIH = 2V至5.5V 6. 低电平输入范围：VIL = -0.5至0.8V 7. 输出驱动能力：≥ 24mA（静态） 8. 静态功耗：极低，确保长时间使用时的电池寿命此芯片还具备多种逻辑功...

产品型号74LCX245的Datasheet PDF文件预览

February 1994

Revised March 2005

74LCX245

Low Voltage Bidirectional Transceiver

with 5V Tolerant Inputs and Outputs

General Description

Features

■ 5V tolerant inputs and outputs

The LCX245 contains eight non-inverting bidirectional buff-

ers with 3-STATE outputs and is intended for bus oriented

applications. The device is designed for low voltage (2.5V

and 3.3V) V_CCapplications with capability of interfacing to

■ 2.3V to 3.6V V_CCspecifications provided

■ 7.0 ns t_PDmax (V_CC3.3V), 10 A I_CCmax

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

a 5V signal environment. The T/R input determines the

direction of data flow through the device. The OE input dis-

ables both the A and B ports by placing them in a high

impedance state.

■

24 mA output drive (V_CC3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

The LCX245 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Human body model 2000V

Machine model 200V

■ Leadless DQFN Pb-Free package

Note 1: To ensure the high-impedance state during power up or down, OE

should be tied to V

through a pull-up resistor: the minimum value or the

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Package

Order Number

Package Description

Number

74LCX245WM

(Note 2)

M20B

M20D

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74LCX245WMX_NL

(Note 4)

74LCX245SJ

(Note 2)

74LCX245BQX

(Note 3)

MLP020B Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC

MO-241, 2.5 x 4.5mm

74LCX245MSA

(Note 2)

MSA20

MTC20

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

74LCX245MTC

(Note 2)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74LCX245MTCX_NL

(Note 4)

Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Pb-Free package per JEDEC J-STD-020B.

Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Note 3: DQFN package available in Tape and Reel only.

Note 4: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

DS012006

www.fairchildsemi.com

Logic Symbol

Connection Diagrams

Pin Assignments for SOIC,

SOP, SSOP, and TSSOP

Pin Descriptions

Pin Names

Description

Output Enable Input

Transmit/Receive Input

T/R

A₀–A₇

B₀–B₇

Side A Inputs or 3-STATE Outputs

Side B Inputs or 3-STATE Outputs

Pin Assignment for DQFN

Truth Table

Inputs

Outputs

T/R

Bus B₀– B₇Data to Bus A₀– A₇

Bus A₀– A₇Data to Bus B₀– B₇

HIGH Z State on A₀– A₇, B₀– B₇(Note 5)

HIGH Voltage Level

LOW Voltage Level

Immaterial

High Impedance

Note 5: Unused bus terminals during HIGH Z State must be held

HIGH or LOW.

(Top Through View)

Logic Diagram

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Absolute Maximum Ratings(Note 6)

Symbol

V_CC

Parameter

Supply Voltage

Value

Conditions

Units

0.5 to 7.0

V_I

DC Input Voltage

V_O

DC Output Voltage

Output in 3-STATE

0.5 to V_CC0.5 Output in HIGH or LOW State (Note 7)

I_IK

DC Input Diode Current

DC Output Diode Current

V_IGND

V_OGND

V_OV_CC

I_OK

I_O

DC Output Source/Sink Current

DC Supply Current per Supply Pin

DC Ground Current per Ground Pin

Storage Temperature

I_CC

100

I_GND

T_STG

100

65 to 150

Recommended Operating Conditions (Note 8)

Symbol

Parameter

Min

2.0

1.5

Max

3.6

5.5

V_CC

5.5

Units

V_CC

Supply Voltage

Operating

Data Retention

V_I

Input Voltage

V_O

Output Voltage

HIGH or LOW State

3-STATE

I_OH/I_OL

Output Current

V_CC3.0V to 3.6V

V_CC2.7V to 3.0V

V_CC2.3V to 2.7V

T_A

Free-Air Operating Temperature

t/ V

Input Edge Rate, V_IN0.8V to 2.0V, V_CC3.0V

ns/V

Note 6: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated

at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recom-

mended Operating Conditions” table will define the conditions for actual device operation.

Note 7: I Absolute Maximum Rating must be observed.

Note 8: Unused inputs or I/O pins must be held HIGH or LOW. They may not float.

DC Electrical Characteristics

40 C to 85 C

Max

Symbol

Parameter

Conditions

Units

(V)

2.3 to 2.7

2.7 to 3.6

2.3 to 2.7

2.7 to 3.6

2.3 to 3.6

2.3

Min

1.7

2.0

HIGH Level Input Voltage

LOW Level Input Voltage

HIGH Level Output Voltage

0.7

0.8

100

8 mA

0.2

1.8

2.2

2.4

2.2

12 mA

18 mA

24 mA

2.7

3.0

LOW Level Output Voltage

100

8mA

2.3 to 3.6

2.3

0.2

0.6

0.4

0.55

5.0

12 mA

16 mA

24 mA

2.7

3.0

Input Leakage Current

3-STATE I/O Leakage

5.5V

2.3 to 3.6

5.0

or V

Power-Off Leakage Current

V or V

5.5V

OFF

www.fairchildsemi.com

DC Electrical Characteristics (Continued)

40 C to 85 C

Symbol

Parameter

Conditions

Units

(V)

Min

Max

Quiescent Supply Current

V or GND

2.3 to 3.6

3.6V V , V

5.5V (Note 9)

V 0.6V

Increase in I per Input

500

Note 9: Outputs disabled or 3-STATE only.

AC Electrical Characteristics

40 C to 85 C, R

500

3.3V 0.3V

50 pF

2.7V

2.5V 0.2V

C 30 pF

Symbol

Parameter

Units

50 pF

Min

1.5

Max

7.0

8.5

7.5

1.0

Min

1.5

Max

8.0

9.5

8.5

Min

1.5

Max

8.4

Propagation Delay

PHL

to B or B to A

8.4

PLH

Output Enable Time

10.5

9.0

PZL

PZH

PLZ

Output Disable Time

9.0

PHZ

OSHL

OSLH

Output to Output Skew

(Note 10)

Note 10: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The

specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t

) or LOW-to-HIGH (t

OSLH

OSHL

Dynamic Switching Characteristics

25 C

Symbol

Parameter

Conditions

Units

(V)

3.3

2.5

3.3

2.5

Typical

0.8

Quiet Output Dynamic Peak V

50 pF, V

30 pF, V

50 pF, V

30 pF, V

3.3V, V

2.5V, V

3.3V, V

2.5V, V

OLP

0.6

Quiet Output Dynamic Valley V

0.8

OLV

0.6

Capacitance

Symbol

Parameter

Conditions

Open, V 0V or V

Typical

7.0

Units

Input Capacitance

Input/Output Capacitance

3.3V, V 0V or V

8.0

I/O

Power Dissipation Capacitance

3.3V, V 0V or V , f 10 MHz

25.0

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AC LOADING and WAVEFORMS Generic for LCX Family

FIGURE 1. AC Test Circuit (C_Lincludes probe and jig capacitance)

Test

t_PLH, t_PHL

_PZL, t_PLZ

Switch

Open

6V at V_CC3.3V 0.3V

V_CCx 2 at V_CC2.5V 0.2V

GND

t_PZH, t_PHZ

3-STATE Output High Enable and

Disable Times for Logic

Waveform for Inverting and Non-Inverting Functions

Setup Time, Hold Time and Recovery Time for Logic

Propagation Delay. Pulse Width and t_recWaveforms

t_riseand t_fall

3-STATE Output Low Enable and

Disable Times for Logic

FIGURE 2. Waveforms

(Input Characteristics; f =1MHz, t_r= t_f= 3ns)

V_CC

Symbol

3.3V 0.3V

1.5V

2.7V

1.5V

2.5V 0.2V

V_CC/2

V_mi

V_mo

V_x

1.5V

V_CC/2

V_OL0.3V

V_OH0.3V

V_OL0.3V

V_OH0.3V

V_OL0.15V

V_OH0.15V

V_y

www.fairchildsemi.com

Schematic Diagram Generic for LCX Family

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Tape and Reel Specification

Tape Format for DQFN

Package

Tape

Section

Number

Cavities

125 (typ)

3000

Cavity

Status

Empty

Filled

Cover Tape

Status

Designator

Leader (Start End)

Carrier

Sealed

BQX

Sealed

Trailer (Hub End)

75 (typ)

Empty

Sealed

TAPE DIMENSIONS inches (millimeters)

REEL DIMENSIONS inches (millimeters)

Tape Size

13.0

0.059

(1.50)

0.512

(13.00)

0.795

(20.20)

2.165

0.488

(12.4)

0.724

(18.4)

12 mm

(330.0)

(55.00)

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted

20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package Number M20B

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

Package Number M20D

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm

Package Number MLP020B

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide

Package Number MSA20

www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Package Number MTC20

Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and

Fairchild reserves the right at any time without notice to change said circuitry and specifications.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the

body, or (b) support or sustain life, and (c) whose failure

to perform when properly used in accordance with

instructions for use provided in the labeling, can be rea-

sonably expected to result in a significant injury to the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

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74LCX245BQX产品参数

型号:	74LCX245BQX
Brand Name：	Fairchild Semiconductor
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
零件包装代码：	MLP
包装说明：	VQCCN, LCC20,.1X.18,20
针数：	20
制造商包装代码：	20LD,DQFN,JEDEC MO-241,2.5X4.5MM
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	5.57
Is Samacsys：	N
其他特性：	WITH DIRECTION CONTROL
控制类型：	COMMON CONTROL
计数方向：	BIDIRECTIONAL
系列：	LVC/LCX/Z
JESD-30 代码：	R-PQCC-N20
JESD-609代码：	e4
长度：	4.5 mm
逻辑集成电路类型：	BUS TRANSCEIVER
最大I（ol）：	0.024 A
湿度敏感等级：	1
位数：	8
功能数量：	1
端口数量：	2
端子数量：	20
最高工作温度：	85 °C
最低工作温度：	-40 °C
输出特性：	3-STATE
输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY
封装代码：	VQCCN
封装等效代码：	LCC20,.1X.18,20
封装形状：	RECTANGULAR
封装形式：	CHIP CARRIER, VERY THIN PROFILE
包装方法：	TAPE AND REEL
峰值回流温度（摄氏度）：	260
电源：	3.3 V
Prop。Delay @ Nom-Sup：	7 ns
传播延迟（tpd）：	8.4 ns
认证状态：	Not Qualified
座面最大高度：	0.8 mm
子类别：	Bus Driver/Transceivers
最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	2.5 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD
端子节距：	0.5 mm
端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED
翻译：	N/A
宽度：	2.5 mm
Base Number Matches：	1

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