74LVC07APW原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

当前位置：IC37首页_>7字母起始型号索引_>7字母起始型号索引第199页更新时间：2024-12-04 17:27:16

产品型号74LVC07APW的概述

芯片74LVC07APW的概述 74LVC07APW是一种高性能的逻辑器件，属于74系列芯片中的一部分，专为低电压应用设计。该芯片的主要功能是在逻辑电路中作为缓冲器，特别是在高频和复杂信号处理中，具有极高的稳定性和可靠性。74LVC07APW采用的是CMOS技术，能够以较低的电源电压和功耗正常工作，适合于现代电子设备中的多种应用。详细参数 74LVC07APW作为一个六通道反向缓冲器，其主要技术参数包括： - 电源电压（Vcc）：1.65V至5.5V，这种广泛的电压范围使得它可以在不同的电源条件下工作。 - 输入电压（VIH/VIL）：由于其CMOS设计，逻辑高电平和逻辑低电平的输入电压范围非常严格，保证了信号的准确传输。 - 输出电流：在逻辑高或逻辑低状态下，输出电流可以达到约25mA，适合驱动其他负载如LED等。 - Propagation Delay：在高频信号处理时，信号的传...

产品型号74LVC07APW的Datasheet PDF文件预览

INTEGRATED CIRCUITS

DATA SHEET

74LVC07A

Hex buffer with open-drain outputs

Product speciﬁcation

2000 Mar 07

File under Integrated Circuits, IC24

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

FEATURES

DESCRIPTION

• 5 V tolerant inputs and outputs (open drain) for

interfacing with 5 V logic

The 74LVC07A is a high-performance, low-power,

low-voltage, Si-gate CMOS device, superior to most

advanced CMOS compatible TTL families. Inputs can be

driven from either 3.3 or 5 V devices. This feature allows

the use of these devices as translators in a mixed

3.3 to 5 V environment.

• Wide supply voltage range from 1.65 to 5.5 V

• CMOS low power consumption

• Direct interface with TTL levels

• Inputs accept voltages up to 5 V

The 74LVC07A provides six non-inverting buffers.

• Complies with JEDEC standard no. 8-1A.

The outputs of the 74LVC07A devices are open drain and

can be connected to other open-drain outputs to

implement active-LOW wired-OR or active-HIGH

wired-AND functions.

QUICK REFERENCE DATA

GND = 0 V; T_amb= 25 °C; t_r= t_f≤ 2.5 ns.

SYMBOL

_PLZ/t_PZL

C_I

PARAMETER

CONDITIONS

TYP.

UNIT

propagation delay nA to nY

input capacitance

C_L= 50 pF; V_CC= 3.3 V

2.2

5.0

6.0

C_PD

power dissipation capacitance per gate V_I= GND to V_CC; note 1

Note

1. C_PDis used to determine the dynamic power dissipation (P_Din µW).

P_D= C_PD× V_CC²× f_i+ Σ (C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in Volts;

Σ (C_L× V_CC²× f_o) = sum of the outputs.

FUNCTION TABLE

See note 1.

INPUT

OUTPUT

Note

1. H = HIGH voltage level;

L = LOW voltage level;

Z = high impedance OFF-state.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

ORDERING INFORMATION

PACKAGES

TYPE NUMBER

TEMPERATURE RANGE

PINS

PACKAGE

MATERIAL

CODE

74LVC07AD

−40 to +85 °C

plastic

SOT108-1

SOT402-1

74LVC07APW

TSSOP

PINNING

SYMBOL

DESCRIPTION

1, 3, 5, 9, 11 and 13

1A to 6A

data inputs

data outputs

ground (0 V)

2, 4, 6, 8, 10 and 12

1Y to 6Y

GND

V_CC

DC supply voltage

handbook, halfpage

14 V

13 6A

12 6Y

11 5A

10 5Y

11 5A

13 6A

5Y 10

6Y 12

GND

MNA531

MNA535

Fig.1 Pin configuration.

Fig.2 Logic symbol.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

handbook, halfpage

GND

MNA533

MNA534

Fig.3 IEC logic symbol.

Fig.4 Logic diagram (one gate).

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

RECOMMENDED OPERATING CONDITIONS

LIMITS

MIN. MAX.

1.65 5.5

SYMBOL

PARAMETER

DC supply voltage

CONDITIONS

UNIT

V_CC

V_I

DC input voltage

DC output voltage

5.5

V_CC

5.5

+85

V_O

active mode

high-impedance mode

T_amb

t_r, t_f

operating ambient temperature

input rise and fall ratios

−40

°C

V_CC= 1.65 to 2.7 V

ns/V

_CC= 2.7 to 5.5 V

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

DC supply voltage

CONDITIONS

MIN.

−0.5

MAX.

+6.5

UNIT

V_CC

I_IK

DC input diode current

DC input voltage

V_I< 0

note 1

V_O< 0

−

−50

+6.5

−50

V_I

−0.5

−

I_OK

V_O

DC output clamping diode current

DC output voltage

active mode; note 1

−0.5

V_CC+ 0.5 V

high-impedance mode; note 1 −0.5

+6.5

I_O

DC output sink current

DC V_CCor GND current

storage temperature

power dissipation per package

SO package

V_O= 0 to V_CC

−

°C

I_CC, I_GND

T_stg

−

±100

+150

−65

P_tot

above 70 °C derate linearly

with 8 mW/K

−

500

TSSOP package

above 60 °C derate linearly

with 5.5 mW/K

Note

1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

DC CHARACTERISTICS

Over recommended operating conditions; voltages are referenced to GND (ground = 0 V).

TEST CONDITIONS

T_amb(°C)

SYMBOL

PARAMETER

−40 to +85

UNIT

MAX.

OTHER V_CC(V)

MIN.

1.65 to 1.95 V_CC

TYP.⁽¹⁾

V_IH

HIGH-level input voltage

−

2.3 to 2.7

2.7 to 3.6

4.5 to 5.5

1.65 to 1.95

2.3 to 2.7

2.7 to 3.6

4.5 to 5.5

1.7

2.0

−

0.7 × V_CC

−

V_IL

LOW-level input voltage

−

GND

0.7

0.8

0.30 × V_CC

V_OL

LOW-level output voltage V_I= V_IHor V_IL

I_O= 100 µA

I_O= 4 mA

I_O= 8 mA

I_O= 12 mA

I_O= 24 mA

I_O= 32 mA

1.65 to 5.5

1.65

2.3

−

0.20

0.45

0.3

−

2.7

−

0.4

3.0

−

0.55

±5

4.5

−

I_I

input leakage current

V_I= 5.5 V or GND

3.6

±0.1

0.1

µA

I_OZ

3-state output OFF-state V_I= V_IHor V_IL;

3.6

±10

current

V_O= 5.5 V or GND

V_Ior V_O= 6.5 V

I_off

power-off leakage

current

0.0

−

±0.1

0.1

±10

µA

I_CC

∆I_CC

quiescent supply current V_I= V_CCor GND;

I_O= 0

5.5

additional quiescent

V_I= V_CC− 0.6 V;

2.3 to 5.5

500

supply current per input I_O= 0

Note

1. All typical values are at V_CC= 3.3 V and T_amb= 25 °C.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

AC CHARACTERISTICS

GND = 0 V; V_CC≤ 2.7 V and t_r= t_f≤ 2 ns; V_CC≥ 2.7 V and t_r= t_f≤ 2.5 ns.

TEST CONDITIONS

T_amb(°C)

SYMBOL

PARAMETER

−40 to +85

UNIT

WAVEFORMS

V_CC(V)

MIN. TYP.⁽¹⁾MAX.

t_PLZ/t_PZL

propagation delay nA to nY see Figs 5 and 6

1.65 to 1.95

2.3 to 2.7

2.7

−

2.5

1.6

2.4

2.2

1.6

−

0.5

2.8

3.3

3.6

2.6

3.0 to 3.6

4.5 to 5.5

Note

1. All typical values are measured at T_amb= 25 °C and at V_CCrespectively 1.8, 2.5, 2.7, 3.3 and 5.0 V.

AC WAVEFORMS

handbook, full pagewidth

nA input

GND

PZL

PLZ

nY output

MNA528

V_CC

V_M

V_X

<2.7 V

0.5 × V_CC

1.5 V

V_OL+ 0.15 V

V_OL+ 0.3 V

≥2.7 to 3.6 V

≥4.5 to 5.5 V

0.5 × V_CC

Fig.5 The input nA to output nY propagation delays.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

handbook, full pagewidth

ext

PULSE

GENERATOR

D.U.T.

MNA530

V_CC

V_ext

V_I

V_CC

C_L

R_L

1 kΩ

1.65 to 1.95 V

2.3 to 2.7 V

2.7 V

2 × V_CC

6 V

30 pF

50 pF

V_CC

500 Ω

2.7 V

V_CC

3.3 to 3.6 V

4.5 to 5.5 V

6 V

2 × V_CC

Fig.6 Load circuitry for switching times.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

PACKAGE OUTLINES

SO14: plastic small outline package; 14 leads; body width 3.9 mm

SOT108-1

(A )

pin 1 index

detail X

2.5

scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

(1)

UNIT

max.

0.25

0.10

1.45

1.25

0.49

0.36

0.25

0.19

8.75

8.55

4.0

3.8

6.2

5.8

1.0

0.4

0.7

0.6

0.7

0.3

1.75

1.27

0.050

1.05

0.25

0.01

0.25

0.1

0.25

0.01

8^o

0^o

0.010 0.057

0.004 0.049

0.019 0.0100 0.35

0.014 0.0075 0.34

0.16

0.15

0.244

0.228

0.039 0.028

0.016 0.024

0.028

0.012

inches

0.041

0.01 0.004

0.069

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

97-05-22

99-12-27

SOT108-1

076E06

MS-012

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

(A )

pin 1 index

detail X

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

(2)

(1)

UNIT

max.

8^o

0^o

0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3

6.6

6.2

0.75

0.50

0.4

0.3

0.72

0.38

1.10

0.65

0.25

1.0

0.2

0.13

0.1

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

EIAJ

95-04-04

99-12-27

SOT402-1

MO-153

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

SOLDERING

If wave soldering is used the following conditions must be

observed for optimal results:

Introduction to soldering surface mount packages

• Use a double-wave soldering method comprising a

turbulent wave with high upward pressure followed by a

smooth laminar wave.

This text gives a very brief insight to a complex technology.

A more in-depth account of soldering ICs can be found in

our “Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the

transport direction of the printed-circuit board;

There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable

for surface mount ICs, or for printed-circuit boards with

high population densities. In these situations reflow

soldering is often used.

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the

printed-circuit board.

Reﬂow soldering

The footprint must incorporate solder thieves at the

downstream end.

Reflow soldering requires solder paste (a suspension of

fine solder particles, flux and binding agent) to be applied

to the printed-circuit board by screen printing, stencilling or

pressure-syringe dispensing before package placement.

• For packages with leads on four sides, the footprint must

be placed at a 45° angle to the transport direction of the

printed-circuit board. The footprint must incorporate

solder thieves downstream and at the side corners.

Several methods exist for reflowing; for example,

infrared/convection heating in a conveyor type oven.

Throughput times (preheating, soldering and cooling) vary

between 100 and 200 seconds depending on heating

method.

During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be

applied by screen printing, pin transfer or syringe

dispensing. The package can be soldered after the

adhesive is cured.

Typical reflow peak temperatures range from

215 to 250 °C. The top-surface temperature of the

packages should preferable be kept below 230 °C.

Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal

of corrosive residues in most applications.

Wave soldering

Manual soldering

Conventional single wave soldering is not recommended

for surface mount devices (SMDs) or printed-circuit boards

with a high component density, as solder bridging and

non-wetting can present major problems.

Fix the component by first soldering two

diagonally-opposite end leads. Use a low voltage (24 V or

less) soldering iron applied to the flat part of the lead.

Contact time must be limited to 10 seconds at up to

300 °C.

To overcome these problems the double-wave soldering

method was specifically developed.

When using a dedicated tool, all other leads can be

soldered in one operation within 2 to 5 seconds between

270 and 320 °C.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

Suitability of surface mount IC packages for wave and reﬂow soldering methods

SOLDERING METHOD

PACKAGE

BGA, LFBGA, SQFP, TFBGA

WAVE

not suitable

REFLOW⁽¹⁾

suitable

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS

PLCC⁽³⁾, SO, SOJ

not suitable⁽²⁾

suitable

LQFP, QFP, TQFP

not recommended⁽³⁾⁽⁴⁾suitable

not recommended⁽⁵⁾

suitable

SSOP, TSSOP, VSO

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package

cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the

Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DEFINITIONS

Data sheet status

Objective speciﬁcation

Preliminary speciﬁcation

Product speciﬁcation

This data sheet contains target or goal speciﬁcations for product development.

This data sheet contains preliminary data; supplementary data may be published later.

This data sheet contains ﬁnal product speciﬁcations.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or

more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation

of the device at these or at any other conditions above those given in the Characteristics sections of the speciﬁcation

is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the speciﬁcation.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these

products can reasonably be expected to result in personal injury. Philips customers using or selling these products for

use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such

improper use or sale.

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

NOTES

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

NOTES

2000 Mar 07

Philips Semiconductors

Product speciﬁcation

Hex buffer with open-drain outputs

74LVC07A

NOTES

2000 Mar 07

Philips Semiconductors – a worldwide company

Argentina: see South America

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. +31 40 27 82785, Fax. +31 40 27 88399

Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

Tel. +61 2 9704 8141, Fax. +61 2 9704 8139

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. +64 9 849 4160, Fax. +64 9 849 7811

Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210

Norway: Box 1, Manglerud 0612, OSLO,

Tel. +47 22 74 8000, Fax. +47 22 74 8341

Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773

Pakistan: see Singapore

Belgium: see The Netherlands

Brazil: see South America

Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,

Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474

Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,

Tel. +359 2 68 9211, Fax. +359 2 68 9102

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,

Tel. +48 22 5710 000, Fax. +48 22 5710 001

Portugal: see Spain

Romania: see Italy

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,

Tel. +1 800 234 7381, Fax. +1 800 943 0087

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,

72 Tat Chee Avenue, Kowloon Tong, HONG KONG,

Tel. +852 2319 7888, Fax. +852 2319 7700

Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. +7 095 755 6918, Fax. +7 095 755 6919

Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Colombia: see South America

Czech Republic: see Austria

Tel. +65 350 2538, Fax. +65 251 6500

Slovakia: see Austria

Slovenia: see Italy

Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. +45 33 29 3333, Fax. +45 33 29 3905

South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,

Tel. +27 11 471 5401, Fax. +27 11 471 5398

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. +358 9 615 800, Fax. +358 9 6158 0920

France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. +33 1 4099 6161, Fax. +33 1 4099 6427

South America: Al. Vicente Pinzon, 173, 6th floor,

04547-130 SÃO PAULO, SP, Brazil,

Tel. +55 11 821 2333, Fax. +55 11 821 2382

Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. +49 40 2353 60, Fax. +49 40 2353 6300

Spain: Balmes 22, 08007 BARCELONA,

Tel. +34 93 301 6312, Fax. +34 93 301 4107

Hungary: see Austria

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,

Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,

Tel. +91 22 493 8541, Fax. +91 22 493 0966

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. +41 1 488 2741 Fax. +41 1 488 3263

Indonesia: PT Philips Development Corporation, Semiconductors Division,

Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,

Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,

TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. +353 1 7640 000, Fax. +353 1 7640 200

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,

Tel. +66 2 745 4090, Fax. +66 2 398 0793

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,

TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,

ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813

Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI),

Tel. +39 039 203 6838, Fax +39 039 203 6800

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,

252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,

TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,

MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. +82 2 709 1412, Fax. +82 2 709 1415

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,

Tel. +1 800 234 7381, Fax. +1 800 943 0087

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. +60 3 750 5214, Fax. +60 3 757 4880

Uruguay: see South America

Vietnam: see Singapore

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087

Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Middle East: see Italy

Tel. +381 11 3341 299, Fax.+381 11 3342 553

For all other countries apply to: Philips Semiconductors,

Internet: http://www.semiconductors.philips.com

International Marketing & Sales Communications, Building BE-p, P.O. Box 218,

5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825

SCA

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

Printed in The Netherlands

245004/01/pp16

Date of release: 2000 Mar 07

Document order number: 9397 750 06737

74LVC07APW相关文章

配单直通车

北京元坤伟业科技有限公司服务专线: 010-62104931621064316210489162104791 在线联系:

QQ：857273081 复制

QQ：1594462451 复制

柒号芯城电子商务（深圳）有限公司服务专线: 18922803401 在线联系:

QQ：2881677436 复制

QQ：2881620402 复制

深圳市中利达电子科技有限公司服务专线: 0755-13686833545 在线联系:

QQ：1902134819 复制

QQ：2881689472 复制

首天国际（深圳）科技有限公司服务专线: 0755-82807802/82807803 在线联系:

QQ：528164397 复制

QQ：1318502189 复制

深圳市芯福林电子有限公司服务专线: 13418564337 在线联系:

QQ：2881495808 复制

QQ：308365177 复制

74LVC07APW产品参数

型号:	74LVC07APW
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
IHS 制造商：	NXP SEMICONDUCTORS
零件包装代码：	TSSOP
包装说明：	4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
针数：	14
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	2.85
系列：	LVC/LCX/Z
JESD-30 代码：	R-PDSO-G14
JESD-609代码：	e4
长度：	5 mm
负载电容（CL）：	50 pF
逻辑集成电路类型：	BUFFER
最大I（ol）：	0.024 A
湿度敏感等级：	1
功能数量：	6
输入次数：	1
端子数量：	14
最高工作温度：	125 °C
最低工作温度：	-40 °C
输出特性：	OPEN-DRAIN
封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP
封装等效代码：	TSSOP14,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：	TUBE
峰值回流温度（摄氏度）：	260
电源：	3.3 V
Prop。Delay @ Nom-Sup：	3.6 ns
传播延迟（tpd）：	6.5 ns
认证状态：	Not Qualified
施密特触发器：	NO
座面最大高度：	1.1 mm
子类别：	Gates
最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	1.65 V
标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES
技术：	CMOS
温度等级：	AUTOMOTIVE
端子面层：	NICKEL PALLADIUM GOLD
端子形式：	GULL WING
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	30
宽度：	4.4 mm
Base Number Matches：	1

电子百科

产品导航

产品型号74LVC07APW的概述

产品型号74LVC07APW的Datasheet PDF文件预览

74LVC07APW相关产品

74LVC07APW相关文章

IC37:专业IC行业平台