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产品型号74LVC2G17GV的概述

芯片74LVC2G17GV的概述 74LVC2G17GV是一款高性能的双输入与门(AND gate),属于74LVC系列逻辑芯片。该系列芯片具有低功耗、低电压操作和高速度的特点,适合各种数字电路应用。74LVC2G17GV特别适合于高频率的逻辑电路、计数器、移位寄存器及其他数字电路设计中。其功能强大,广泛应用于消费电子、通信设备和自动化控制系统等多个领域。 74LVC2G17GV的工作电压范围广,从1.65V到5.5V,支持双电源电压,在低电压环境下也能够提供稳定的性能。它不但能够处理TTL(晶体管-晶体管逻辑)输入信号,还能够适应LVCMOS(低电压互补金属氧化物半导体)输入信号。这种广泛的兼容性使得74LVC2G17GV在多种应用环境中表现优异。 芯片74LVC2G17GV的详细参数 74LVC2G17GV的主要特性和参数如下: - 逻辑类型: 与门(AND) - 输入电压范围: ...

产品型号74LVC2G17GV的Datasheet PDF文件预览

INTEGRATED CIRCUITS  
DATA SHEET  
74LVC2G17  
Dual non-inverting Schmitt-trigger  
with 5 V tolerant input  
Product specification  
2003 Aug 13  
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
FEATURES  
APPLICATIONS  
Wide supply voltage range from 1.65 to 5.5 V  
5 V tolerant input/output for interfacing with 5 V logic  
High noise immunity  
Wave and pulse shapers for highly noisy environments.  
DESCRIPTION  
Complies with JEDEC standard:  
– JESD8-7 (1.65 to 1.95 V)  
The 74LVC2G17 is a high-performance, low-power,  
low-voltage, Si-gate CMOS device and superior to most  
advanced CMOS compatible TTL families.  
– JESD8-5 (2.3 to 2.7 V)  
Inputs can be driven from either 3.3 or 5 V devices. These  
feature allows the use of these devices as translators in a  
mixed 3.3 and 5 V environment.  
– JESD8B/JESD36 (2.7 to 3.6 V).  
ESD protection:  
– HBM EIA/JESD22-A114-A exceeds 2000 V  
– MM EIA/JESD22-A115-A exceeds 200 V.  
• ±24 mA output drive (VCC = 3.0 V)  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
SOT363 and SOT457 package  
Specified from 40 to +125 °C.  
This device is fully specified for partial power-down  
applications using Ioff. The Ioff circuitry disables the output,  
preventing the damaging back flow current through the  
device when it is powered down.  
The 74LVC2G17 provides two non-inverting buffers with  
Schmitt-trigger action. It is capable of transforming slowly  
changing input signals into sharply defined, jitter-free  
output signals.  
QUICK REFERENCE DATA  
GND = 0 V; Tamb = 25 °C.  
SYMBOL  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
tPHL/tPLH  
propagation delay inputs nA to output nY VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ  
5.6  
ns  
ns  
ns  
ns  
ns  
VCC = 2.5 V; CL = 30 pF; RL = 500 3.7  
V
V
CC = 2.7 V; CL = 50 pF; RL = 500 3.8  
CC = 3.3 V; CL = 50 pF; RL = 500 3.6  
VCC = 5.0 V; CL = 50 pF; RL = 500 2.7  
CI  
input capacitance  
power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2  
3.5  
pF  
pF  
CPD  
16.3  
Notes  
1. CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in Volts;  
N = total load switching outputs;  
(CL × VCC2 × fo) = sum of outputs.  
2. The condition is VI = GND to VCC  
.
2003 Aug 13  
2
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
FUNCTION TABLE  
See note 1.  
INPUT  
nA  
OUTPUT  
nY  
L
L
H
H
Note  
1. H = HIGH voltage level;  
L = LOW voltage level.  
ORDERING INFORMATION  
PACKAGES  
PACKAGE MATERIAL  
TYPE NUMBER  
TEMPERATURE  
PINS  
CODE  
MARKING  
RANGE  
74LVC2G17GW  
74LVC2G17GV  
40 to +125 °C  
40 to +125 °C  
6
6
SC-88  
SC-74  
plastic  
plastic  
SOT363  
SOT457  
VV  
V17  
PINNING  
PIN  
SYMBOL  
DESCRIPTION  
1
2
3
4
5
6
1A  
data input  
GND  
2A  
ground (0 V)  
data input  
2Y  
data output  
supply voltage  
data output  
VCC  
1Y  
2003 Aug 13  
3
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
handbook, halfpage  
handbook, halfpage  
1
3
1A  
2A  
1Y  
2Y  
6
4
1A  
GND  
2A  
1Y  
V
1
2
3
6
5
4
17  
CC  
2Y  
MNB065  
MNB066  
Fig.1 Pin configuration.  
Fig.2 Logic symbol.  
handbook, halfpage  
handbook, halfpage  
1A  
1
3
6
4
1Y  
2A  
2Y  
MNB068  
MNB067  
Fig.3 IEC logic symbol.  
Fig.4 Logic diagram.  
2003 Aug 13  
4
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
VCC  
PARAMETER  
supply voltage  
CONDITIONS  
MIN.  
1.65  
MAX.  
5.5  
UNIT  
V
VI  
input voltage  
0
5.5  
VCC  
+125  
20  
V
VO  
output voltage  
0
V
Tamb  
tr, tf  
operating ambient temperature  
input rise and fall times  
40  
0
°C  
VCC = 1.65 to 2.7 V  
CC = 2.7 to 5.5 V  
ns/V  
ns/V  
V
0
10  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).  
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT  
VCC supply voltage 0.5 +6.5  
V
IIK  
input diode current  
input voltage  
VI < 0  
note 1  
50  
mA  
V
VI  
0.5  
+6.5  
±50  
IOK  
VO  
output diode current  
output voltage  
VO > VCC or VO < 0  
mA  
V
active mode; notes 1 and 2  
0.5  
VCC + 0.5  
+6.5  
±50  
Power-down mode; notes 1 and 2 0.5  
V
IO  
output source or sink current  
VCC or GND current  
storage temperature  
power dissipation  
VO = 0 to VCC  
mA  
mA  
°C  
mW  
ICC, IGND  
±100  
+150  
300  
Tstg  
PD  
65  
Tamb = 40 to +125 °C  
Notes  
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.  
2003 Aug 13  
5
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
DC CHARACTERISTICS  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
TEST CONDITIONS  
SYMBOL  
PARAMETER  
MIN.  
TYP.(1)  
MAX.  
UNIT  
OTHER  
VCC (V)  
Tamb = 40 to +85 °C  
VOL  
LOW-level output voltage VI = VIH or VIL  
IO = 100 µA  
IO = 4 mA  
IO = 8 mA  
IO = 12 mA  
IO = 24 mA  
IO = 32 mA  
1.65 to 5.5  
1.65  
2.3  
0.1  
V
V
V
V
V
V
0.45  
0.3  
2.7  
0.4  
3.0  
0.55  
0.55  
4.5  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = 100 µA  
IO = 4 mA  
1.65 to 5.5  
V
CC 0.1  
V
1.65  
2.3  
2.7  
3.0  
4.5  
5.5  
0
1.2  
1.9  
2.2  
2.3  
3.8  
V
IO = 8 mA  
V
IO = 12 mA  
IO =24 mA  
IO = 32 mA  
VI = 5.5 V or GND  
VI or VO = 5.5 V  
V
V
V
ILI  
input leakage current  
±0.1  
±0.1  
±5  
±10  
µA  
µA  
Ioff  
power OFF leakage  
current  
ICC  
quiescent supply current VI = VCC or GND;  
IO = 0  
5.5  
0.1  
5
10  
µA  
µA  
ICC  
additional quiescent  
supply current per pin  
VI = VCC 0.6 V;  
IO = 0  
2.3 to 5.5  
500  
2003 Aug 13  
6
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
TEST CONDITIONS  
OTHER VCC (V)  
SYMBOL  
PARAMETER  
MIN.  
TYP.(1)  
MAX.  
UNIT  
Tamb = 40 to +125 °C  
VOL  
LOW-level output voltage VI = VIH or VIL  
IO = 100 µA  
IO = 4 mA  
IO = 8 mA  
IO = 12 mA  
IO = 24 mA  
IO = 32 mA  
1.65 to 5.5  
1.65  
2.3  
0.1  
V
V
V
V
V
V
0.70  
0.45  
0.60  
0.80  
0.80  
2.7  
3.0  
4.5  
VOH  
HIGH-level output  
voltage  
VI = VIH or VIL  
IO = 100 µA  
IO = 4 mA  
1.65 to 5.5  
V
CC 0.1  
V
1.65  
2.3  
2.7  
3.0  
4.5  
5.5  
0
0.95  
1.7  
1.9  
2.0  
3.4  
V
IO = 8 mA  
V
IO = 12 mA  
IO =24 mA  
IO = 32 mA  
VI = 5.5 V or GND  
VI or VO = 5.5 V  
V
V
V
ILI  
input leakage current  
±0.1  
±20  
±20  
µA  
µA  
Ioff  
power OFF leakage  
current  
ICC  
quiescent supply current VI = VCC or GND;  
IO = 0  
5.5  
40  
µA  
µA  
ICC  
additional quiescent  
supply current per pin  
VI = VCC 0.6 V;  
IO = 0  
2.3 to 5.5  
5000  
Note  
1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.  
2003 Aug 13  
7
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
TRANSFER CHARACTERISTICS  
Voltages are referenced to GND (ground = 0 V).  
TEST CONDITIONS  
SYMBOL  
PARAMETER  
MIN.  
TYP.(1)  
MAX.  
UNIT  
WAVEFORMS  
VCC (V)  
Tamb = 40 to +85 °C  
VT+  
VT  
VH  
positive-going threshold  
negative-going threshold  
hysteresis (VT+ VT)  
see Figs 5 and 6  
1.8  
2.3  
3.0  
4.5  
5.5  
1.8  
2.3  
3.0  
4.5  
5.5  
0.70  
1.10  
1.40  
1.76  
2.47  
2.91  
0.61  
0.80  
1.04  
1.55  
1.86  
0.49  
0.60  
0.73  
0.92  
1.02  
1.50  
V
1.00  
1.30  
1.90  
2.20  
0.25  
0.40  
0.60  
1.00  
1.20  
0.15  
0.25  
0.40  
0.60  
0.70  
1.80  
2.20  
3.10  
3.60  
0.90  
1.15  
1.50  
2.00  
2.30  
1.00  
1.10  
1.20  
1.50  
1.70  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
see Figs 5 and 6  
see Figs 5, 6 and 7 1.8  
2.3  
3.0  
4.5  
5.5  
Tamb = 40 to +125 °C  
VT+  
VT−  
VH  
positive-going threshold  
see Figs 5 and 6  
see Figs 5 and 6  
1.8  
2.3  
3.0  
4.5  
5.5  
1.8  
2.3  
3.0  
4.5  
5.5  
0.70  
1.00  
1.30  
1.90  
2.20  
0.25  
0.40  
0.60  
1.00  
1.20  
0.15  
0.25  
0.40  
0.60  
0.70  
1.70  
2.00  
2.40  
3.30  
3.80  
1.10  
1.35  
1.70  
2.20  
2.50  
1.20  
1.30  
1.40  
1.70  
1.90  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
negative-going threshold  
hysteresis (VT+ VT)  
see Figs 5, 6 and 7 1.8  
2.3  
3.0  
4.5  
5.5  
Notes  
1. All typical values are measured at Tamb = 25 °C.  
2003 Aug 13  
8
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
handbook, halfpage  
V
handbook, halfpage  
O
V
T+  
V
I
V
H
V
T−  
V
O
V
I
V
H
V
V
T+  
MNB070  
T−  
MNB069  
VT+ and VTare between limits of 20% and 70%.  
Fig.5 Transfer characteristic.  
Fig.6 Definition of VT+, VTand VH.  
MNB071  
14  
handbIook, halfpage  
CC  
(mA)  
12  
10  
8
6
4
2
0
0
0.5  
1
1.5  
2
V (V)  
I
VCC = 3.0 V.  
Fig.7 Typical 74LVC2G17 transfer characteristic.  
9
2003 Aug 13  
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
AC CHARACTERISTICS  
GND = 0 V.  
TEST CONDITIONS  
SYMBOL  
PARAMETER  
MIN.  
TYP.(1)  
MAX.  
UNIT  
WAVEFORMS  
VCC (V)  
Tamb = 40 to +85 °C  
tPHL/tPLH propagation delay nA to nY see Figs 8 and 9  
1.65 to 1.95  
2.3 to 2.7  
2.7  
1.5  
5.6  
10.5  
ns  
1.0  
1.0  
1.0  
1.0  
3.7  
3.8  
3.6  
2.7  
6.5  
6.5  
5.7  
4.3  
ns  
ns  
ns  
ns  
3.0 to 3.6  
4.5 to 5.5  
Tamb = 40 to +125 °C  
tPHL/tPLH propagation delay nA to nY see Figs 8 and 9  
1.65 to 1.95  
2.3 to 2.7  
2.7  
1.5  
1.0  
1.0  
1.0  
1.0  
13.1  
8.5  
8.5  
7.1  
5.4  
ns  
ns  
ns  
ns  
ns  
3.0 to 3.6  
4.5 to 5.5  
Note  
1. All typical values are measured at Tamb = 25 °C.  
2003 Aug 13  
10  
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
AC WAVEFORMS  
V
handbook, halfpage  
nA input  
I
V
V
M
M
GND  
t
t
PLH  
PHL  
V
OH  
V
V
M
nY output  
M
V
OL  
MNB072  
INPUT  
tr = tf  
VCC  
VM  
VI  
1.65 to 1.95 V 0.5 × VCC  
VCC  
VCC  
2.0 ns  
2.0 ns  
2.5 ns  
2.5 ns  
2.5 ns  
2.3 to 2.7 V  
2.7 V  
0.5 × VCC  
1.5 V  
2.7 V  
2.7 V  
VCC  
3.0 to 3.6 V  
4.5 to 5.5 V  
1.5 V  
0.5 × VCC  
VOL and VOH are typical output voltage drop that occur with the output load.  
Fig.8 The input (nA) to output (nY) propagation delays and the output transition times.  
V
EXT  
V
CC  
R
L
V
V
O
I
PULSE  
GENERATOR  
D.U.T.  
C
R
R
L
L
T
MNA616  
VEXT  
VCC  
VI  
VCC  
CL  
RL  
tPLH/tPHL  
tPZH/tPHZ  
tPZL/tPLZ  
1.65 to 1.95 V  
2.3 to 2.7 V  
2.7 V  
30 pF  
30 pF  
50 pF  
50 pF  
50 pF  
1 kΩ  
open  
open  
open  
open  
open  
GND  
GND  
GND  
GND  
GND  
2 × VCC  
2 × VCC  
6 V  
VCC  
500 Ω  
500 Ω  
500 Ω  
500 Ω  
2.7 V  
2.7 V  
VCC  
3.0 to 3.6 V  
4.5 to 5.5 V  
6 V  
2 × VCC  
Definitions for test circuit:  
RL = Load resistor.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.  
Fig.9 Load circuitry for switching times.  
11  
2003 Aug 13  
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
APPLICATION INFORMATION  
MNB073  
50  
handbook, halfpage  
I
CC  
(mA)  
40  
30  
20  
10  
0
2
3
4
5
6
V
(V)  
CC  
Linear change of VI between 0.8 to 2.0 V.  
All values given are typical unless otherwise specified.  
Fig.10 Average ICC for 74LVC2G17 Schmitt-trigger  
devices.  
2003 Aug 13  
12  
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
PACKAGE OUTLINES  
Plastic surface mounted package; 6 leads  
SOT363  
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1  
index  
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B  
e
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
1
UNIT  
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max  
0.30  
0.20  
1.1  
0.8  
0.25  
0.10  
2.2  
1.8  
1.35  
1.15  
2.2  
2.0  
0.45  
0.15  
0.25  
0.15  
mm  
0.1  
1.3  
0.65  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
97-02-28  
SOT363  
SC-88  
2003 Aug 13  
13  
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
Plastic surface mounted package; 6 leads  
SOT457  
D
B
E
A
X
y
H
v
M
A
E
6
5
4
Q
pin 1  
index  
A
A
1
c
1
2
3
L
p
e
b
p
w
M B  
detail X  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
UNIT  
A
A
1
b
c
D
E
e
H
L
Q
v
w
y
p
p
E
0.1  
0.013  
0.40  
0.25  
1.1  
0.9  
0.26  
0.10  
3.1  
2.7  
1.7  
1.3  
3.0  
2.5  
0.6  
0.2  
0.33  
0.23  
mm  
0.95  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
97-02-28  
01-05-04  
SOT457  
SC-74  
2003 Aug 13  
14  
Philips Semiconductors  
Product specification  
Dual non-inverting Schmitt-trigger with  
5 V tolerant input  
74LVC2G17  
DATA SHEET STATUS  
DATA SHEET  
STATUS(1)  
PRODUCT  
STATUS(2)(3)  
LEVEL  
DEFINITION  
I
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
II  
Preliminary data Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Relevant changes will  
be communicated via a Customer Product/Process Change Notification  
(CPCN).  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes in the products -  
including circuits, standard cells, and/or software -  
described or contained herein in order to improve design  
and/or performance. When the product is in full production  
(status ‘Production’), relevant changes will be  
Application information  
Applications that are  
communicated via a Customer Product/Process Change  
Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these  
products, conveys no licence or title under any patent,  
copyright, or mask work right to these products, and  
makes no representations or warranties that these  
products are free from patent, copyright, or mask work  
right infringement, unless otherwise specified.  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2003 Aug 13  
15  
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2003  
SCA75  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
613508/01/pp16  
Date of release: 2003 Aug 13  
Document order number: 9397 750 11688  
配单直通车
74LVC2G17GW产品参数
型号:74LVC2G17GW
是否Rohs认证: 符合
生命周期:Active
IHS 制造商:NEXPERIA
包装说明:SOT-363, 6 PIN
Reach Compliance Code:compliant
HTS代码:8542.39.00.01
风险等级:5.55
Samacsys Confidence:4
Samacsys Status:Released
Samacsys PartID:423435
Samacsys Pin Count:6
Samacsys Part Category:Integrated Circuit
Samacsys Package Category:SOT23 (6-Pin)
Samacsys Footprint Name:SOT363 (SC-88)-74
Samacsys Released Date:2017-06-19 22:15:35
Is Samacsys:N
系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G6
JESD-609代码:e3
长度:2 mm
逻辑集成电路类型:BUFFER
湿度敏感等级:1
功能数量:2
输入次数:1
端子数量:6
最高工作温度:125 °C
最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260
传播延迟(tpd):13.1 ns
座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V
表面贴装:YES
技术:CMOS
温度等级:AUTOMOTIVE
端子面层:Tin (Sn)
端子形式:GULL WING
端子节距:0.65 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:30
宽度:1.25 mm
Base Number Matches:1
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