ACT8332
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
Rev0, 14-Mar-08
NAME
VP1
SW1
GP1
OUT2
INL
OUT3
GA
ON1
ON3
DESCRIPTION
Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as
possible to the IC.
Switching node Output for REG1. Connect this pin to the switching end of the inductor.
Power Ground for REG1. Connect GA, GP1 together at a single point as close to the IC as
possible.
Output voltage for REG2. Capable of delivering up to 360mA of output current. Output has
high impedance when disabled.
Power input for REG2, REG3. Bypass to GA with a high quality ceramic capacitor placed as
close as possible to the IC.
Output voltage for REG3. Capable of delivering up to 360mA of output current. Output has
high impedance when disabled.
Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 together at a
single point as close to the IC as possible.
Enable control input for REG1, REG2. Drive ON1 to the VP1 or a logic high for normal
operation, drive to GA or a logic low to disable REG1, REG2
Enable control input for REG3. Drive ON3 to the INL or a logic high for normal operation, drive
to GA or a logic low to disable REG3
Output Feedback Sense. For fixed output voltage options REG1, connect this pin directly to
the output node to connect the internal feedback network to the output voltage. For adjustable
output voltage Options REG1. The voltage at this pin is regulated to 0.625V. Connect this pin
to the center point of the output voltage feedback network between OUT1 and GA to set the
output voltage.
Exposed Pad. Must be soldered to ground on PCB
10
FB1
EP
EP
Innovative Power
TM
ActivePMU
TM
-4-
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is a trademark of Active-Semi.
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