ACT8810
Active- Semi
Rev 8, 08-Oct-10
SYSTEM MANAGEMENT
REGISTER DESCRIPTIONS
Note: See Table 1 for default register settings.
Table 2:
Control Register Map
DATA
ADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
06h
R
R
R
W/E
R
R
nPBMASK PBSTAT
R: Read-Only bits. Default Values May Vary.
W/E: Write-Exact bits. Read/Write bits which must be written exactly as specified in Table 1.
Table 3:
Control Register Bit Descriptions
ADDRESS
NAME
BIT ACCESS
FUNCTION
DESCRIPTION
De-assert
0
1
0
1
06h
PBSTAT
[0]
[1]
R/W
R/W
Push Button Status
Asserted
Masked
06h
nPBMASK
Push Button Interrupt Mask Option
Not Mask
06h
06h
06h
[3:2]
[4]
R
W/E
R
READ ONLY
WRITE-EXACT
READ ONLY
[7:5]
Innovative PowerTM
- 11 -
www.active-semi.com
ActivePMUTM and ActivePathTM are trademarks of Active-Semi.
Copyright © 2010 Active-Semi, Inc.
I2CTM is a trademark of NXP.