a
FEATURES
Single-Chip Integrated
∑∆
Digital Audio Stereo Codec
Supports the Microsoft Windows Sound System®
Multiple Channels of Stereo Input
Analog and Digital Signal Mixing
Programmable Gain and Attenuation
On-Chip Signal Filters
Digital Interpolation
Analog Output Low-Pass
Sample Rates from 5.5 kHz to 48 kHz
68-Lead PLCC and 68-Lead TQFP Packages
Operation from +5 V Supplies
Byte-Wide Parallel Interface to ISA and EISA Buses
Supports One or Two DMA Channels and
Programmed I/O
PRODUCT OVERVIEW
Parallel-Port 16-Bit
SoundPort Stereo Codec
AD1848K
supply. It provides a direct, byte-wide interface to both ISA
(“AT”) and EISA computer buses for simplified implementa-
tion on a computer motherboard or add-in card. The AD1848K
generates enable and direction controls for IC buffers such as
74_245.
The AD1848K SoundPort Stereo Codec supports a DMA re-
quest/grant architecture for transferring data with the host com-
puter bus. One or two DMA channels can be supported.
Programmed I/O (PIO) mode is also supported for control
register accesses and for applications lacking DMA control. Two
input control lines support mixed direct and indirect addressing
of twenty-one internal control registers over this asynchronous
interface.
External circuit requirements are limited to a minimal number
of low cost support components. Anti-imaging DAC output fil-
ters are incorporated on-chip. Dynamic range exceeds 80 dB
over the 20 kHz audio band. Sample rates from 5.5 kHz to
48 kHz are supported from external crystals.
The Codec includes a stereo pair of
∑∆
analog-to-digital
converters and a stereo pair of
∑∆
digital-to-analog converters.
Inputs to the ADC can be selected from four stereo pairs of
(Continued on page 9)
The Parallel-Port AD1848K SoundPort® Stereo Codec inte-
grates the key audio data conversion and control functions into
a single integrated circuit. The AD1848K is intended to provide
a complete, single-chip audio solution for business audio and
multimedia applications requiring operation from a single +5 V
SoundPort is a registered trademark of Analog Devices, Inc.
FUNCTIONAL BLOCK DIAGRAM
ANALOG
SUPPLY
DIGITAL
SUPPLY
CRYSTALS
2
2
POWER DOWN
ANALOG
L_LINE
R_LINE
L
L_MIC
R_MIC
L_AUX1
R_AUX1
20
dB
GAIN
MUX
R
GAIN
∑∆
A/D
CONVERTER
16
∑∆
A/D
CONVERTER
16
DIGITAL
OSCILLATORS
µ/
A
L
A
W
PLAYBACK REQ
P
A
R
A
L
L
E
L
P
O
R
T
2
PLAYBACK ACK
CAPTURE REQ
CAPTURE ACK
2
8
ADR1:0
DATA7:0
CS
WR
RD
BUS DRIVER
CONTROL
HOST DMA
INTERRUPT
2
EXTERNAL
CONTROL
DIGITAL
MIX
GAIN/ATTEN/MUTE
L
L_OUT
R
∑
ATTEN/
MUTE
ANALOG
FILTER
∑∆
D/A
CONVERTER
∑∆
D/A
CONVERTER
∑
µ/
A
L
A
W
INTERPOL
ATTENUATE
R_OUT
∑
ATTEN/
MUTE
ANALOG
FILTER
INTERPOL
ATTENUATE
∑
L_AUX2
R_AUX2
GAIN/ATTEN/MUTE
REFERENCE
CONTROL
REGS
2.25V
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
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