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AD1981B 参数 Datasheet PDF下载

AD1981B图片预览
型号: AD1981B
PDF下载: 下载PDF文件 查看货源
内容描述: AC '97的SoundMAX编解码器 [AC ’97 SoundMAX Codec]
分类和应用: 解码器编解码器
文件页数/大小: 28 页 / 270 K
品牌: ADI [ ADI ]
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AD1981B  
Record Gain Register (Index 1Ch)  
Reg  
No. Name  
D15 D14 D13 D12 D11  
D10  
D9  
D8  
D7  
D6  
D5 D4 D3  
D2  
D1  
D0  
Default  
1Ch Record Gain IM  
X
X
X
LIM3 LIM2  
LIM1 LIM0 RM*  
X
X
X
RIM3 RIM2 RIM1 RIM0 8000h  
*For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right  
channels. If MSPLT is not set, RM bit has no effect. All registers not shown and bits containing an X are assumed to be reserved. Refer to Table VI for examples.  
RIM[3:0]  
RM  
Right Input Mixer Gain Control. Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.  
Right Channel Mute. Once enabled by the MSPLT bit in Register 76h, this bit mutes the right channel separately  
from the IM bit. Otherwise, this bit will always read 0 and will have no affect when set to 1.  
LIM[3:0]  
IM  
Left Input Mixer Gain Control. Each LSB represents 1.5 dB, 0000 = 0 dB, and the gain range is 0 dB to 22.5 dB.  
Input Mute. When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in  
Register 76h is set to 1, in which case this mute bit will affect only the left channel.  
Table VI. Settings for Record Gain Register  
Control Bits  
Record Gain (1Ch)  
Reg. 76h  
Left Channel Input Mixer D[11:8]  
MSPLT* D15 WRITE READBACK Function  
Right Channel Input Mixer D[3:0]  
D7* WRITE READBACK Function  
0
0
0
1
0
0
1
0
1111  
0000  
xxxx  
1111  
1111  
0000  
xxxx  
1111  
22.5 dB Gain  
0 dB Gain  
x
x
x
1
1111  
0000  
xxxx  
xxxx  
1111  
0000  
xxxx  
xxxx  
22.5 dB Gain  
0 dB Gain  
dB Gain, Muted  
22.5 dB Gain  
dB Gain, Muted  
dB Gain,  
Right Only Muted  
1
1
1
1
xxxx  
xxxx  
xxxx  
xxxx  
dB Gain,  
Left Only Muted  
0
1
1111  
xxxx  
1111  
xxxx  
22.5 dB Gain  
dB Gain,  
dB Gain, Right Muted  
Left Muted  
*For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 76h. The MSPLT bit enables separate mute bits for the left and right  
channels. If MSPLT is not set, RM bit has no effect.  
x is a wild card and has no effect on the value.  
General-Purpose Register (Index 20h)  
Reg  
No. Name  
D15  
D14 D13 D12 D11 D10 D9  
D8  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Default  
20h General-Purpose  
X
X
X
X
X
X
MIX MS  
LPBK  
X
X
X
X
X
X
X
0000h  
This register should be read before writing to generate a mask for only the bit(s) that need to be changed. All registers not shown and bits containing an X are assumed  
to be reserved.  
LPBK  
MS  
Loopback Control. ADC/DAC Digital Loopback Mode.  
0 = No Loopback (Default).  
1 = Loopback PCM Digital Data from ADC Output to DAC.  
MIC Select. Selects mono MIC input.  
0 = Select MIC1.  
1 = Select MIC2.  
See 2CMIC bit in Register 76h to enable stereo microphone recording.  
MIX  
Mono Output Select. Selects mono output audio source.  
0 = Mixer mono output (reset default).  
1 = MIC1 channel.  
REV. B  
–16–