Data Sheet
FEATURES
Guaranteed monotonic
INL error: ±1 LSB max
On-chip 1.25 V/2.5 V, 10 ppm/°C reference
Temperature range: –40°C to +85°C
Rail-to-rail output amplifier
Power-down
Package type: 100-lead LQFP (14 mm × 14 mm)
User interfaces:
Parallel
Serial (SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible,
featuring data readback)
2
I C®-compatible
Robust 6.5 kV HBM and 2 kV FICDM ESD rating
40-Channel, 3 V/5 V, Single-Supply,
12-Bit,
denseDAC
®
INTEGRATED FUNCTIONS
Channel monitor
Simultaneous output update via LDAC
Clear function to user-programmable code
Amplifier boost mode to optimize slew rate
User-programmable offset and gain adjust
Toggle mode enables square wave generation
Thermal monitors
APPLICATIONS
Variable optical attenuators (VOAs)
Level setting (ATE)
Optical micro-electro-mechanical systems (MEMs)
Control systems
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
DVDD (×3)
PD
SER/PAR
FIFO EN
CS/(SYNC/AD0)
WR/(DCEN/AD1)
SDO
DB11/(DIN/SDA)
DB10/(SCLK/SCL)
DB9/(SPI/I
2
C)
DB8
12
INPUT 12
REG0
12
FIFO
+
STATE
MACHINE
+
CONTROL
LOGIC
12
m REG0
c REG0
R
12
INPUT 12
REG1
12
12
m REG1
c REG1
R
VOUT4
12
POWER-ON
RESET
INPUT 12
REG6
12
12
m REG6
c REG6
R
12
VOUT0………VOUT38
INPUT 12
REG7
12
39-TO-1
MUX
12
m REG7
c REG7
R
R
VOUT38
03732-001
DGND (×3)
AVDD (×5)
AGND (×5)
DAC_GND (×5)
REFGND
REFOUT/REFIN
SIGNAL_GND (×5)
AD5381
1.25V/2.5V
REFERENCE
12
DAC 12
REG0
DAC 0
VOUT0
R
DB0
A5
A0
REG0
REG1
RESET
BUSY
CLR
INTERFACE
CONTROL
LOGIC
12
DAC 12
REG1
DAC 1
VOUT1
VOUT2
R
VOUT3
12
DAC 12
REG6
DAC 6
VOUT5
VOUT6
R
12
DAC 12
REG7
DAC 7
VOUT7
VOUT8
×5
VOUT39/MON_OUT
LDAC
Figure 1.
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However no
,
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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