AD598
13. Load current through R
L
returns to the junction of R5 and
R6, and flows back to V
PS
. Under maximum load condi-
tions, make sure the voltage drop across R5 is met as
defined in Step 12.
As a final check on the power supply voltages, verify that the
peak values of V
A
and V
B
are at least 2.5 volts less than the
voltages at +V
S
and –V
S
.
14. C5 is a bypass capacitor in the range of 0.1
µF
to 1
µF.
+ 30V
R5
V
ps
6.8µF
0.1µF
C5
R6
1 –V
S
2 EXC 1
3 EXC 2
4 LEV 1
R1
5 LEV 2
C1
15nF
6 FREQ 1
7 FREQ 2
8 B1 FILT
C2
9 B2 FILT
V
B
10 V
B
A2 FILT 12
V
A
11
SIG OUT 16
FEEDBACK 15
OUT FILT 14
A1 FILT 13
C3
R2
33k
C4
V
OUT
+V
S
20
R4
OFFSET 1 19
OFFSET 2 18
R3
SIG REF 17
R
L
SIGNAL
REFERENCE
equal in value. Note also a shunt capacitor across R2 shown as a
parameter (see Figure 7). The value of R2 used was 81 kΩ with
a Schaevitz E100 LVDT.
AD598
V
A
SCHAEVITZ E100
LVDT
Figure 12. Interconnection Diagram for Single
Supply Operation
Gain Phase Characteristics
Figure 13. Gain and Phase Characteristics vs. Frequency
(0 kHz–10 kHz)
To use an LVDT in a closed loop mechanical servo application,
it is necessary to know the dynamic characteristics of the trans-
ducer and interface elements. The transducer itself is very quick
to respond once the core is moved. The dynamics arise prima-
rily from the interface electronics. Figures 13, 14 and 15 show
the frequency response of the AD598 LVDT Signal Condi-
tioner. Note that Figures 14 and 15 are basically the same; the
difference is frequency range covered. Figure 14 shows a wider
range of mechanical input frequencies at the expense of accu-
racy. Figure 15 shows a more limited frequency range with en-
hanced accuracy. The figures are transfer functions with the
input to be considered as a sinusoidally varying mechanical posi-
tion and the output as the voltage from the AD598; the units of
the transfer function are volts per inch. The value of C2, C3 and
C4, from Figure 7, are all equal and designated as a parameter
in the figures. The response is approximately that of two real
poles. However, there is appreciable excess phase at higher fre-
quencies. An additional pole of filtering can be introduced with
a shunt capacitor across R2, (see Figure 7); this will also in-
crease phase lag.
When selecting values of C2, C3 and C4 to set the bandwidth of
the system, a trade-off is involved. There is ripple on the “dc”
position output voltage, and the magnitude is determined by the
filter capacitors. Generally, smaller capacitors will give higher
system bandwidth and larger ripple. Figures 16 and 17 show the
magnitude of ripple as a function of C2, C3 and C4, again all
Figure 14. Gain and Phase Characteristics vs. Frequency
(0 kHz–50 kHz)
–8–
REV. A
AD [ ANALOG DEVICES ]
