AD629
5V/DIV
+10V
V
OUT
0V
5V/DIV
0V
V
OUT
–10V
OUTPUT
ERROR
1mV = 0.01%
OUTPUT
ERROR
1mV = 0.01%
00783-024
1mV/DIV
10µs/DIV
1mV/DIV
10µs/DIV
Figure 23. Settling Time to 0.01%, for 0 V to 10 V Output Step; G = −1, R
L
= 2 kΩ
350
300
250
200
150
100
50
0
–150
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
Figure 26. Settling Time to 0.01% for 0 V to −10 V Output Step; G = −1, R
L
= 2kΩ
300
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
250
NUMBER OF UNITS
NUMBER OF UNITS
200
150
100
50
00783-025
00783-027
–100
–50
0
50
100
COMMON-MODE REJECTION RATIO (ppm)
150
0
–900
–600
–300
0
300
OFFSET VOLTAGE (µV)
600
900
Figure 24. Typical Distribution of Common-Mode Rejection; Package Option N-8
400
350
300
NUMBER OF UNITS
Figure 27. Typical Distribution of Offset Voltage; Package Option N-8
400
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
NUMBER OF UNITS
350
300
250
200
150
100
00783-026
N = 2180
n
≈
200 PCS. FROM
10 ASSEMBLY LOTS
250
200
150
100
50
0
–600
–400
–200
0
200
–1 GAIN ERROR (ppm)
400
600
0
–600
–400
–200
0
200
+1 GAIN ERROR (ppm)
400
600
Figure 25. Typical Distribution of −1 Gain Error; Package Option N-8
Figure 28. Typical Distribution of +1 Gain Error; Package Option N-8
Rev. B | Page 8 of 16
00783-029
50
00783-028
AD [ ANALOG DEVICES ]
