AD734–SPECIFICATIONS
(T = +25 C, +V = VP = +15 V, –V = VN = –15 V, R
≥
2 k
A
S
S
L
)
TRANSFER FUNCTION
W
=
A
O
(
X
1
−
X
2
)(
Y
1
−
Y
2
)
−
(
Z
1
−
Z
2
)
�½
(
U
1
−U
2
)
Conditions
A
Min Typ Max
W = XY/10
0.1 0.4
1
0.004
0.01 0.05
0.05
0.025
–58
–55
–60
–57
–85 –60
–85 –66
1.0
–94
–88
–85
B
Min Typ Max
W = XY/10
0.1 0.25
0.6
0.003
0.01 0.05
0.05
0.025
–66
–63
–80
–74
–85 –70
–85 –76
1.0
–94
–88
–85
S
Min Typ Max
W = XY/10
0.1 0.4
1.25
0.004
0.01 0.05
0.05
0.025
–58
–55
–60
–57
–85 –60
–85 –66
1.0
–94
–88
–85
Units
Parameter
MULTIPLIER PERFORMANCE
Transfer Function
Total Static Error
1
Over T
MIN
to T
MAX
vs. Temperature
vs. Either Supply
Peak Nonlinearity
THD
2
–10 V
≤
X, Y
≤
10 V
T
MIN
to T
MAX
±
V
S
= 14 V to 16 V
–10 V
≤
X
≤
+10 V, Y = +10 V
–10 V
≤
Y
≤
+10 V, X = +10 V
X = 7 V rms, Y = +10 V, f
≤
5 kHz
T
MIN
to T
MAX
Y = 7 V rms, X = +10 V, f
≤
5 kHz
T
MIN
to T
MAX
X = 7 V rms, Y = nulled, f
≤
5 kHz
Y = 7 V rms, X = nulled, f
≤
5 kHz
X=Y=0
100 Hz to 1 MHz
10 Hz to 20 kHz
T
MIN
to T
MAX
Feedthrough
Noise (RTO)
Spectral Density
Total Output Noise
DIVIDER PERFORMANCE (Y = 10 V)
Transfer Function
Gain Error
X Input Clipping Level
U Input Scaling Error
3
(Output to 1%)
INPUT INTERFACES (X, Y, & Z)
3 dB Bandwidth
Operating Range
X Input Offset Voltage
Y Input Offset Voltage
%
%
%/°C
%/V
%
%
dBc
dBc
dBc
dBc
dBc
dBc
µV/√Hz
dBc
dBc
Y = 10 V, U = 100 mV to 10 V
Y
≤
10 V
T
MIN
to T
MAX
U = 1 V to 10 V Step, X = 1 V
W = XY/U
1
1.25
×
U
0.3
0.8
100
40
±
12.5
15
25
10
12
20
50
54
50
70
70
85
50
50
2
VN to VP-3
1000:1
28
±
12
72
8
10
450
125
200
50
8
300
400
66
56
70
W = XY/U
1
1.25
×
U
0.15
0.65
100
40
±
12.5
5
15
5
6
10
50
70
85
50
50
2
VN to VP-3
1000:1
28
±
12
72
10
450
125
200
50
8
150
300
54
50
70
W = XY/U
1
1.25
×
U
0.3
1
100
40
±
12.5
15
25
10
12
20
90
70
85
50
50
2
VN to VP-3
1000:1
28
±
12
72
10
450
125
200
50
300
500
%
V
%
%
ns
MHz
V
mV
mV
mV
mV
mV
mV
dB
dB
dB
nA
nA
kΩ
pF
V
kΩ
V
dB
MHz
V/µs
ns
ns
mA
V
mA
Differential or Common Mode
T
MIN
to T
MAX
T
MIN
to T
MAX
Z Input Offset Voltage
Z Input PSRR (Either Supply)
CMRR
Input Bias Current (X, Y, Z Inputs)
Input Resistance
Input Capacitance
T
MIN
to T
MAX
f
≤
1 kHz
T
MIN
to T
MAX
f = 5 kHz
T
MIN
to T
MAX
Differential
Differential
DENOMINATOR INTERFACES (U0, U1, & U2)
Operating Range
Denominator Range
Interface Resistor
U1 to U2
OUTPUT AMPLIFIER (W)
Output Voltage Swing
Open-Loop Voltage Gain
Dynamic Response
3 dB Bandwidth
Slew Rate
Settling Time
To 1%
To 0.1%
Short-Circuit Current
POWER SUPPLIES,
±
V
S
Operating Supply Range
Quiescent Current
T
MIN
to T
MAX
X = Y = 0, Input to Z
From X or Y Input, CL
≤
20 pF
W
≤
7 V rms
+20 V or –20 V Output Step
T
MIN
to T
MAX
20
±
8
6
80
20
80
20
80
±
16.5
12
T
MIN
to T
MAX
9
±
16.5
±
8
12
6
9
±
16.5
±
8
12
6
9
NOTES
1
Figures given are percent of full scale (e.g., 0.01% = 1 mV).
2
dBc refers to deciBels relative to the full-scale input (carrier) level of 7 V rms.
3
See Figure 10 for test circuit.
All min and max specifications are guaranteed.
Specifications subject to change without notice.
–2–
REV. C
AD [ ANALOG DEVICES ]
