a
FEATURES
Specified for V
DD
of 3 V to 5.5 V
AD7858—200 kSPS; AD7858L—100 kSPS
System and Self-Calibration with Autocalibration on
Power-Up
Eight Single-Ended or Four Pseudo-Differential Inputs
Low Power
AD7858: 12 mW (V
DD
= 3 V)
AD7858L: 4.5 mW (V
DD
= 3 V)
Automatic Power-Down After Conversion (25 W)
Flexible Serial Interface:
8051/SPI™/QSPI™/ P Compatible
24-Lead DIP, SOIC, and SSOP Packages
APPLICATIONS
Battery-Powered Systems (Personal Digital Assistants,
Medical Instruments, Mobile Communications)
Pen Computers
Instrumentation and Control Systems
High-Speed Modems
GENERAL DESCRIPTION
3 V to 5 V Single Supply, 200 kSPS
8-Channel, 12-Bit Sampling ADC
AD7858/AD7858L*
FUNCTIONAL BLOCK DIAGRAM
AV
DD
AGND
AIN1
I/P
MUX
AIN8
2.5V
REFERENCE
T/H
AD7858/
AD7858L
DV
DD
COMP
REF
IN
/REF
OUT
C
REF1
CHARGE
REDISTRIBUTION
DAC
CLKIN
C
REF2
CALIBRATION
MEMORY AND
CONTROLLER
SAR AND ADC
CONTROL
CONVST
BUSY
SLEEP
BUF
DGND
CAL
SERIAL INTERFACE/CONTROL REGISTER
The AD7858/AD7858L are high-speed, low-power, 12-bit
ADCs that operate from a single 3 V or 5 V power supply, the
AD7858 being optimized for speed and the AD7858L for low
power. The ADC powers up with a set of default conditions at
which time it can be operated as a read-only ADC. The ADC
contains self-calibration and system calibration options to en-
sure accurate operation over time and temperature and have a
number of power-down options for low-power applications.
The part powers up with a set of default conditions and can
operate as a read-only ADC.
The AD7858 is capable of 200 kHz throughput rate while the
AD7858L is capable of 100 kHz throughput rate. The input
track-and-hold acquires a signal in 500 ns and features a
pseudo-differential sampling scheme. The AD7858/AD7858L
voltage range is 0 to V
REF
with straight binary output coding.
Input signal range is to the supply and the part is capable of con-
verting full power signals to 100 kHz.
CMOS construction ensures low power dissipation of typically
4.5 mW for normal operation and 1.15 mW in power-down
mode with a throughput rate of 10 kSPS (V
DD
= 3 V). The part
is available in 24-lead, 0.3 inch-wide dual-in-line package
(DIP), 24-lead small outline (SOIC), and 24-lead small shrink
outline (SSOP) packages.
SYNC
DIN
DOUT
SCLK
PRODUCT HIGHLIGHTS
1. Specified for 3 V and 5 V supplies.
2. Automatic calibration on power-up.
3. Flexible power management options including automatic
power-down after conversion.
4. Operates with reference voltages from 1.2 V to V
DD
.
5. Analog input range from 0 V to V
DD
.
6. Eight single-ended or four pseudo-differential input channels.
7. System and self-calibration.
8. Versatile serial I/O port (SPI/QSPI/8051/µP).
9. Lower power version AD7858L.
*Patent
pending.
See page 31 for data sheet index.
SPI and QSPI are trademarks of Motorola, Inc.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD [ ANALOG DEVICES ]
