AD8041
C9
R2
V
= +5V
S
100
90
S1N
C3
g
Vi
R1
m
V
OUT
g
m2
S1P
C7
10
0%
g
Vi
R1
m
1V
200ns
Figure 37. 2:1 Multiplexer Performance
Single Supply A/D Conversion
Figure 35. Small Signal Schematic
Disable Operation
Figure 38 shows the AD8041 driving the analog inputs of the
AD9050 in a dc coupled system with single ended signals. All
components are powered from a single +5 V supply. The
AD820 is used to offset the ground referenced input signal to
the level required by the AD9050. The AD8041 is used to add
in the offset with the ground referenced input signal and buffer
the input to AD9050. The nominal input range of the AD9050
The AD8041 has an active-low disable pin, which can be used
to three-state the output of the part and also lower its supply
current. If the disable pin is left floating, the part is enabled and
will perform normally. If the disable pin is pulled to 2.5 V
(min) below the positive supply, output of the AD8041 will be
disabled and the nominal supply current will drop to less than
1.6 mA. For best isolation, the disable pin should be pulled to
as low a voltage as possible; ideally, the negative supply rail.
1000Ω
+5V
The disable pin on the AD8041 allows it to be configured as
an 2:1 mux as shown in Figure 36 and can be used to switch
many types of high speed signals. Higher order multiplexers can
also be built. The break-before-make switching time is approxi-
mately 50 ns to disable the output and 300 ns to enable the
output.
+5V
1000Ω
V
IN
10
–0.5V TO +0.5V
AD8041
2.8V – 3.8V
3.3V
AD9050
9
0.1µF
+5V
+5V
1000Ω
1000Ω
0.1µF
10µF
AD820
CH0
5MHz
7
3
2
50Ω
AD8041
6
4
G = 2
Figure 38. 10-Bit, 40 MSPS A/D Conversion
8
is +2.8 V and +3.8 V (1 V p-p centered at +3.3 V). This circuit
provides 40 MSPS analog-to-digital conversion on just 330 mW
of power while delivering 10-bit performance.
330Ω
330Ω
50Ω
+5V
0
10µF
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
F
= 4.9MHz
1
FUNDAMENTAL = 0.6dB
2nd HARMONIC = 66.9dB
3rd HARMONIC = 74.7dB
SNR = 55.2dB
NOISE FLOOR = – 86.1dB
ENCODE FREQUENCY = 40MHz
CH1
10MHz
7
3
2
50Ω
AD8041
6
G = 2
4
8
330Ω
330Ω
10
12 11
13
74HC04
Figure 36. 2:1 Multiplexer
Figure 39. FFT Output of Circuit in Figure 38
–12–
REV. 0
ADI [ ADI ]
