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AD9696KR 参数 Datasheet PDF下载

AD9696KR图片预览
型号: AD9696KR
PDF下载: 下载PDF文件 查看货源
内容描述: 超快的TTL比较器 [Ultrafast TTL Comparators]
分类和应用: 比较器
文件页数/大小: 8 页 / 138 K
品牌: AD [ ANALOG DEVICES ]
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FEATURES
4.5 ns Propagation Delay
200 ps Maximum Propagation Delay Dispersion
Single +5 V or 5 V Supply Operation
Complementary Matched TTL Outputs
APPLICATIONS
High Speed Line Receivers
Peak Detectors
Window Comparators
High Speed Triggers
Ultrafast Pulse Width Discriminators
Ultrafast
TTL Comparators
AD9696/AD9698
Both devices allow the use of either a single +5 V supply or
±
5 V supplies. The choice of supplies determines the common
mode input voltage range available: –2.2 V to +3.7 V for
±
5 V
operation, +1.4 V to +3.7 V for single +5 V supply operation.
The differential input stage features high precision, with offset
voltages that are less than 2 mV and offset currents less than
1
µA.
A latch enable input is provided to allow operation in ei-
ther sample-and-hold or track-and-hold applications.
The AD9696 and AD9698 are both available as commercial
temperature range devices operating from ambient temperatures
of 0°C to +70°C, and as extended temperature range devices for
ambient temperatures from –55°C to +125°C. Both versions are
available qualified to MIL-STD-883 class B.
Package options for the AD9696 include a 10-pin TO-100 metal
can, an 8-pin ceramic DIP, an 8-pin plastic DIP, and an 8-lead
small outline plastic package. The AD9698 is available in a
16-pin ceramic DIP, a 16-lead ceramic gullwing, a 16-pin plastic
DIP and a 16-lead small outline plastic package. Military quali-
fied versions of the AD9696 come in the TO-100 can and
ceramic DIP; the dual AD9698 comes in ceramic DIP.
GENERAL DESCRIPTION
The AD9696 and AD9698 are ultrafast TTL-compatible volt-
age comparators able to achieve propagation delays previously
possible only in high performance ECL devices. The AD9696 is
a single comparator providing 4.5 ns propagation delay, 200 ps
maximum delay dispersion and 1.7 ns setup time. The AD9698
is a dual comparator with equally high performance; both de-
vices are ideal for critical timing circuits in such applications as
ATE, communications receivers and test instruments.
FUNCTIONAL BLOCK DIAGRAM
AD9696
AD9696/AD9698 Architecture
NONINVERTING
INPUT
INVERTING
INPUT
Q OUTPUT
Q OUTPUT
INPUT
LATCH
GAIN
LEVEL
SHIFT
OUTPUT
LATCH
ENABLE
AD9698
NONINVERTING
INPUT
INVERTING
INPUT
Q OUTPUT
#1
Q OUTPUT
Q OUTPUT
Q OUTPUT
#2
NONINVERTING
INPUT
INVERTING
INPUT
LATCH
ENABLE
LATCH
ENABLE
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997