ADM202E/ADM1181A
PIN FUNCTION DESCRIPTION
PIN CONNECTIONS
C1+ 1
16 V
CC
15 GND
Mnemonic
V
CC
V+
V–
GND
C1+, C1–
Function
Power Supply Input: +5 V
±
10%.
Internally Generated Positive Supply
(+9 V nominal).
Internally Generated Negative Supply
(–9 V nominal).
Ground Pin. Must Be Connected to 0 V.
External Capacitor 1 is connected between
these pins. 0.1
µF
capacitor is recommended
but larger capacitors up to 47
µF
may be used.
External Capacitor 2 is connected between
these pins. 0.1
µF
capacitor is recommended
but larger capacitors up to 47
µF
may be used.
Transmitter (Driver) Inputs. These inputs ac-
cept TTL/CMOS levels.
Transmitter (Driver) Outputs. These are RS-
232 signal levels (typically
±
9 V).
Receiver Inputs. These inputs accept RS-232
signal levels. An Internal 5 kΩ pull-down resis-
tor to GND is connected on each input.
Receiver Outputs. These are CMOS output
logic levels.
V+ 2
C1– 3
C2+ 4
C2– 5
ADM202E
14
ADM1181A
13
T1
OUT
R1
IN
TOP VIEW 12 R1
OUT
(Not to Scale)
V– 6
11 T1
IN
10 T2
IN
9 R2
OUT
T2
OUT
7
R2
IN
8
NC = NO CONNECT
C2+, C2–
T
IN
T
OUT
R
IN
R
OUT
+5V INPUT
0.1µF
10V
0.1µF
10V
+5V TO +10V V
CC 16
VOLTAGE
3
C1–
V+
2
DOUBLER
1
C1+
4
C2+
+5V INPUT
0.1µF
10V
0.1µF
10V
+5V TO +10V V
CC 16
VOLTAGE
3
C1–
V+
2
DOUBLER
1
C1+
4
C2+
C3
0.1µF
6.3V
C4
0.1µF
10V
T1
OUT
C5
0.1µF
+10V TO –10V V–
6
VOLTAGE
5
C2–
INVERTER
T1
T2
14
+10V TO –10V V–
6
VOLTAGE
5
C2–
INVERTER
T1
T2
14
C4
0.1µF
10V
T1
OUT
C3
0.1µF
10V
C5
0.1µF
10V
T1
IN
CMOS
INPUTS
T2
IN
R1
OUT
R2
OUT
11
T1
IN
EIA/TIA-232
OUTPUTS
11
10
7
T2
OUT
R1
IN
R2
IN
EIA/TIA-232
INPUTS
*
CMOS
INPUTS
T2
IN
R1
OUT
R2
OUT
10
7
EIA/TIA-232
OUTPUTS
T2
OUT
R1
IN
R2
IN
EIA/TIA-232
INPUTS
*
12
R1
13
12
R1
13
CMOS
OUTPUTS
CMOS
OUTPUTS
9
R2
8
9
R2
8
GND
15
ADM202E
GND
15
ADM1181A
NOTE
*
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
NOTE
*
INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT
ADM202E Typical Operating Circuit
ADM1181A Typical Operating Circuit
REV. 0
–3–
AD [ ANALOG DEVICES ]
