SHARC Processor
SUMMARY
High performance 32-Bit DSP—applications in audio, medi-
cal, military, wireless communications, graphics, imaging,
motor-control, and telephony
Super Harvard Architecture—four independent buses for
dual data fetch, instruction fetch, and nonintrusive zero-
overhead I/O
Code compatible with all other sharc family DSPs
Single-instruction multiple-data (SIMD) computational archi-
tecture—two 32-bit IEEE floating-point computation units,
each with a multiplier, ALU, shifter, and register file
Serial ports offer I
2
S support via 8 programmable and simul-
taneous receive or transmit pins, which support up to 16
transmit or 16 receive channels of audio
Integrated peripherals—integrated I/O processor, 1M bit on-
chip dual-ported SRAM, SDRAM controller, glueless multi-
processing features, and I/O ports (serial, link, external
bus, SPI, and JTAG)
ADSP-21161N supports 32-bit fixed, 32-bit float, and 40-bit
floating-point formats
100 MHz/110 MHz core instruction rate
Single-cycle instruction execution, including SIMD opera-
tions in both computational units
Up to 660 MFLOPs peak and 440 MFLOPs sustained
performance
225-ball 17 mm
17
mm CSP_BGA package
CORE PROCESSOR
INSTRUCTION
CACHE
32 48-BIT
DUAL-PORTED SRAM
BLOCK 0
TIMER
PROCESSOR PORT
ADDR
ADDR
DATA
DATA
DATA
I/O PORT
ADDR
BLOCK 1
TWO INDEPENDENT
DUAL-PORTED BLOCKS
JTAG TEST
AND EMULATION
GPIO
FLAGS
SDRAM
CONTROLLER
6
12
DATA
ADDR
8
DAG1
8 4 32
DAG2
8 4 32
PROGRAM
SEQUENCER
IOD
64
IOA
18
EXTERNAL PORT
ADDR BUS
MUX
24
32
PM ADDRESS BUS
DM ADDRESS BUS
64
BUS
CONNECT
(PX)
PM DATA BUS
DM DATA BUS
64
32
MULTIPROCESSOR
INTERFACE
DATA BUS
MUX
DATA
REGISTER
FILE
(PEX)
16 40-BIT
DATA
REGISTER
FILE
(PEY)
16 40-BIT
32
HOST PORT
MULT
BARREL
SHIFTER
BARREL
SHIFTER
MULT
ALU
ALU
IOP
REGISTERS
(MEMORY MAPPED)
CONTROL,
STATUS, &
DATA BUFFERS
DMA
CONTROLLER
SERIAL PORTS (4)
5
16
20
S
Figure 1. ADSP-21161N Functional Block Diagram
SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.
LINK PORTS (2)
SPI PORTS (1)
4
I/O PROCESSOR
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
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Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
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