Low Power, Chip Scale
10-Bit SD/HD Video Encoder
ADV7390/ADV7391/ADV7392/ADV7393
FEATURES
3 high quality, 10-bit video DACs
16× (216 MHz) DAC oversampling for SD
8× (216 MHz) DAC oversampling for ED
4× (297 MHz) DAC oversampling for HD
37 mA maximum DAC output current
Multiformat video input support
4:2:2 YCrCb (SD, ED, and HD)
4:4:4 RGB (SD)
Multiformat video output support
Composite (CVBS) and S-Video (Y/C)
Component YPrPb (SD, ED, and HD)
Component RGB (SD, ED, and HD)
Lead frame chip scale package (LFCSP) options
32-lead, 5 mm × 5 mm LFCSP
40-lead, 6 mm × 6 mm LFCSP
Advanced power management
Patented content-dependent low power DAC operation
Automatic cable detection and DAC power-down
Individual DAC on/off control
Sleep mode with minimal power consumption
74.25 MHz 8-/10-/16-bit high definition input support
Compliant with SMPTE 274M (1080i), 296M (720p),
and 240M (1035i)
EIA/CEA-861B compliance support
NTSC M, PAL B/D/G/H/I/M/N, PAL 60 support
SCL/ SDA/ ALSB/
MOSI SCLK SPI_SS
NTSC and PAL square pixel operation (24.54 MHz/29.5 MHz)
Macrovision® Rev 7.1.L1 (SD) and Rev 1.2 (ED) compliant
Programmable features
Luma and chroma filter responses
Vertical blanking interval (VBI)
Subcarrier frequency (F
SC
) and phase
Luma delay
Copy generation management system (CGMS)
Closed captioning and wide screen signaling (WSS)
Integrated subcarrier locking to external video source
Complete on-chip video timing generator
On-chip test pattern generation
Serial MPU interface with dual I
2
C® and SPI® compatibility
2.7 V or 3.3 V analog operation
1.8 V digital operation
3.3 V I/O operation
Temperature range: −40°C to +85°C
APPLICATIONS
Mobile handsets
Digital still cameras
Portable media and DVD players
Portable game consoles
Digital camcorders
Set-top box (STB)
Automotive infotainment (ADV7393 only)
FUNCTIONAL BLOCK DIAGRAM
DGND (2)
V
DD
(2)
SFL/
MISO
AGND
V
AA
GND_IO
VDD_IO
VBI DATA SERVICE
INSERTION
MPU PORT
ADV739x
SUBCARRIER FREQUENCY
LOCK (SFL)
YUV
TO
YCrCb/
RGB
SIN/COS DDS
BLOCK
16×
FILTER
10-BIT
DAC 1
10-BIT
DAC 2
DAC 1
4:2:2 TO 4:4:4
P15 TO P0/
P7 TO P0
INPUT
DEINTERLEAVE
ADD
BURST
PROGRAMMABLE
CHROMINANCE
FILTER
MULTIPLEXER
RGB/YCrCb
TO
YUV
MATRIX
ADD
SYNC
PROGRAMMABLE
LUMINANCE
FILTER
DAC 2
16×
FILTER
10-BIT
DAC 3
DAC 3
ASYNC
BYPASS
YCrCb
HDTV
TEST
PATTERN
GENERATOR
POWER
MANAGEMENT
CONTROL
PROGRAMMABLE
ED/HD FILTERS
SHARPNESS AND
ADAPTIVE FILTER
CONTROL
YCbCr
TO
RGB MATRIX
4×
FILTER
VIDEO TIMING GENERATOR
16x/4x OVERSAMPLING PLL
REFERENCE
AND CABLE
DETECT
R
SET
06234-001
RESET
HSYNC
VSYNC
CLKIN
PV
DD
PGND EXT_LF
COMP
Figure 1.
Protected by U.S. Patent Numbers 5,343,196 and 5,442,355 and other intellectual property rights.
Protected by U.S. Patent Numbers 4,631,603, 4,577,216, 4,819,098, and other intellectual property rights.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.
AD [ ANALOG DEVICES ]
