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EVAL-ADXL343Z 参数 Datasheet PDF下载

EVAL-ADXL343Z图片预览
型号: EVAL-ADXL343Z
PDF下载: 下载PDF文件 查看货源
内容描述: 数字MEMS加速度计 [Digital MEMS Accelerometer]
分类和应用:
文件页数/大小: 36 页 / 601 K
品牌: AD [ ANALOG DEVICES ]
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Data Sheet
FEATURES
Multipurpose accelerometer with 10- to 13-bit resolution for
use in a wide variety of applications
Digital output accessible via SPI (3- and 4-wire) and I
2
C
Built-in motion detection features make tap, double-tap,
activity, inactivity, and free-fall detection trivial
User-adjustable thresholds
Interrupts independently mappable to two interrupt pins
Low power operation down to 23 µA and embedded FIFO for
reducing overall system power
Wide supply voltage range: 2.0 V to 3.6 V
I/O voltage 1.7 V to V
S
Wide operating temperature range (−40°C to +85°C)
10,000
g
shock survival
Small, thin, Pb free, RoHS compliant 3 mm × 5 mm × 1 mm
LGA package
3-Axis, ±2
g/±4 g/±8 g/±16 g
Digital MEMS Accelerometer
GENERAL DESCRIPTION
The
is a versatile 3-axis, digital-output, low
g
MEMS
accelerometer. Selectable measurement range and bandwidth, and
configurable, built-in motion detection make it suitable for sensing
acceleration in a wide variety of applications. Robustness to
10,000
g
of shock and a wide temperature range (−40°C to +85°C)
enable use of the accelerometer even in harsh environments.
The
measures acceleration with high resolution (13-bit)
measurement at up to ±16
g.
Digital output data is formatted as
16-bit twos complement and is accessible through either an SPI
(3- or 4-wire) or I
2
C digital interface. The
can
measure the static acceleration of gravity in tilt-sensing appli-
cations, as well as dynamic acceleration resulting from motion
or shock. Its high resolution (3.9 mg/LSB) enables measurement
of inclination changes less than 1.0°.
Several special sensing functions are provided. Activity and
inactivity sensing detect the presence or lack of motion. Tap
sensing detects single and double taps in any direction. Free-fall
sensing detects if the device is falling. These functions can be
mapped individually to either of two interrupt output pins.
An integrated memory management system with a 32-level first in,
first out (FIFO) buffer can be used to store data to minimize host
processor activity and lower overall system power consumption.
The
is supplied in a small, thin, 3 mm × 5 mm × 1 mm,
14-terminal, plastic package.
APPLICATIONS
Handsets
Gaming and pointing devices
Hard disk drive (HDD) protection
FUNCTIONAL BLOCK DIAGRAM
V
S
V
DD I/O
ADXL343
POWER
MANAGEMENT
SENSE
ELECTRONICS
3-AXIS
SENSOR
ADC
DIGITAL
FILTER
CONTROL
AND
INTERRUPT
LOGIC
INT1
INT2
32 LEVEL
FIFO
SDA/SDI/SDIO
SERIAL I/O
SDO/ALT
ADDRESS
10627-001
SCL/SCLK
GND
CS
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.