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EVAL-AD7609EDZ 参数 Datasheet PDF下载

EVAL-AD7609EDZ图片预览
型号: EVAL-AD7609EDZ
PDF下载: 下载PDF文件 查看货源
内容描述: 8通道差分DAS与18位 [8-Channel Differential DAS with 18-Bit]
分类和应用:
文件页数/大小: 36 页 / 788 K
品牌: AD [ ANALOG DEVICES ]
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Data Sheet
FEATURES
8 simultaneously sampled inputs
True differential inputs
True bipolar analog input ranges: ±10 V, ±5 V
Single 5 V analog supply and 2.3 V to 5.25 V V
DRIVE
Fully integrated data acquisition solution
Analog input clamp protection
Input buffer with 1 MΩ analog input impedance
Second-order antialiasing analog filter
On-chip accurate reference and reference buffer
18-bit ADC with 200 kSPS on all channels
Oversampling capability with digital filter
Flexible parallel/serial interface
SPI/QSPI™/MICROWIRE™/DSP compatible
Performance
7 kV ESD rating on analog input channels
98 dB SNR, −107 dB THD
Dynamic range: up to 105 dB typical
Low power: 100 mW
Standby mode: 25 mW
64-lead LQFP package
8-Channel Differential DAS with 18-Bit,
Bipolar, Simultaneous Sampling ADC
APPLICATIONS
Power line monitoring and protection systems
Multiphase motor control
Instrumentation and control systems
Multiaxis positioning systems
Data acquisition systems (DAS)
COMPANION PRODUCTS
External References:
Digital Isolators:
Power:
Additional companion products on the
Table 1. High Resolution, Bipolar Input, Simultaneous
Sampling DAS Solutions
Resolution
18 Bits
16 Bits
Single-
Ended
Inputs
True
Differential
Inputs
Number of
Simultaneous
Sampling Channels
8
8
6
4
8
14 Bits
1
Patent pending.
FUNCTIONAL BLOCK DIAGRAM
AV
CC
AV
CC
REGCAP
REGCAP
REFCAPB
REFCAPA
V1+
V1–
CLAMP
CLAMP
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
1MΩ
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
R
FB
SECOND-
ORDER LPF
SECOND-
ORDER LPF
SECOND-
ORDER LPF
SECOND-
ORDER LPF
SECOND-
ORDER LPF
SECOND-
ORDER LPF
SECOND-
ORDER LPF
SECOND-
ORDER LPF
T/H
2.5V
LDO
2.5V
LDO
REFIN/REFOUT
V2+
V2–
CLAMP
CLAMP
T/H
2.5V
REF
REF SELECT
AGND
OS 2
OS 1
OS 0
V3+
V3–
CLAMP
CLAMP
T/H
V4+
V4–
CLAMP
CLAMP
T/H
8:1
MUX
T/H
SERIAL
18-BIT
SAR
DIGITAL
FILTER
PARALLEL/
SERIAL
INTERFACE
D
OUT
A
D
OUT
B
RD/SCLK
CS
PAR/SER SEL
V
DRIVE
V5+
V5–
CLAMP
CLAMP
V6+
V6–
CLAMP
CLAMP
T/H
PARALLEL
DB[15:0]
V7+
V7–
AD7609
T/H
CLK OSC
CONTROL
INPUTS
BUSY
FRSTDATA
09760-001
CLAMP
CLAMP
V8+
V8–
CLAMP
CLAMP
T/H
AGND
CONVST A CONVST B RESET RANGE
Figure 1.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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