OP470–SPECIFICATIONS
WAFER TEST LIMITS
(at V =
S
15 V, 25 C, unless otherwise noted.)
OP470GBC
Parameter
INPUT OFFSET VOLTAGE
INPUT OFFSET CURRENT
INPUT BIAS CURRENT
LARGE-SIGNAL
Voltage Gain
INPUT VOLTAGE RANGE
*
OUTPUT VOLTAGE SWING
COMMON-MODE
REJECTION
POWER SUPPLY
REJECTION RATIO
SUPPLY CURRENT
(All Amplifiers)
Symbol
V
OS
I
OS
I
B
A
VO
IVR
V
O
CMR
PSRR
I
SY
Conditions
V
CM
= 0 V
V
CM
= 0 V
V
O
=
±
10 V
R
L
= 10 kW
R
L
= 2 kW
R
L
≥
2 kW
V
CM
=
±
11 V
V
S
=
±
4.5 V to
±
18 V
No Load
Limit
0.8
20
50
800
400
±
11
±
12
100
5.6
11
Unit
mV Max
nA Max
nA Min
V/mV Min
V Min
V Min
dB
mV/V
Max
mA Max
NOTE
*
Guaranteed by CMR test
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaran-
teed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
–4–
REV. B
AD [ ANALOG DEVICES ]
