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HCPL-0661 参数 Datasheet PDF下载

HCPL-0661图片预览
型号: HCPL-0661
PDF下载: 下载PDF文件 查看货源
内容描述: 高CMR长线接收光电耦合器 [High CMR Line Receiver Optocouplers]
分类和应用: 光电输出元件
文件页数/大小: 16 页 / 242 K
品牌: AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
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Notes:
1. Bypassing of the power supply line is required, with a 0.1
µF
ceramic disc capacitor adjacent to each optocoupler as illustrated in
Figure 15. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
2. Device considered a two terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
3. The t
PLH
propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising
edge of the output pulse.
4. The t
PHL
propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling
edge of the output pulse.
5. The t
ELH
enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point
on the rising edge of the output pulse.
6. The t
EHL
enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on
the falling edge of the output pulse.
7. CM
H
is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state
(i.e., V
OUT
> 2.0 V).
8. CM
L
is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e.,
V
OUT
< 0.8 V).
9. For sinusoidal voltages,
|dv
CM
|
––––––
=
πf
CM
V
CM
(p-p)
dt max
10. No external pull up is required for a high logic state on the enable input. If the V
E
pin is not used, tying V
E
to V
CC
will result in
improved CMR performance.
11. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage of
3000 for one second
(leakage detection current limit, I
i-o
5
µA).
12. t
PSK
is equal to the worst case difference in t
PHL
and/or t
PLH
that will be seen between units at any given temperature within the
operating condition range.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
I
OH
– HIGH LEVEL OUTPUT CURRENT – µA
15
V
CC
= 5.5 V
V
O
= 5.5 V
V
E
= 2 V
I
I
= 250 µA
10
V
OL
– LOW LEVEL OUTPUT VOLTAGE – V
0.5
2.6
V
I
– INPUT VOLTAGE – V
V
CC
= 5.5 V
V
E
= 2 V
I
I
= 5 mA
I
O
= 12.8 mA
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0°C
25°C
70°C
0.4
0.3
I
O
= 16 mA
5
0.2
I
O
= 9.6 mA
0.1
-60 -40 -20
I
O
= 6.4 mA
0
-60 -40 -20
0
20
40
60
80 100
0
20
40
60
80 100
0
10
20
30
40
50
60
T
A
– TEMPERATURE – °C
T
A
– TEMPERATURE – °C
I
I
– INPUT CURRENT – mA
Figure 1. Typical High Level Output
Current vs. Temperature.
Figure 2. Typical Low Level Output
Voltage vs. Temperature.
Figure 3. Typical Input Characteristics.
6
I
OL
– LOW LEVEL OUTPUT CURRENT – mA
V
O
– OUTPUT VOLTAGE – V
5
4
3
V
CC
= 5 V
T
A
= 25 °C
70
V
CC
= 5 V
V
E
= 2 V
V
OL
= 0.6 V
60
I
I
= 10-15 mA
50
R
L
= 350
R
L
= 1 KΩ
2
R
L
= 4 KΩ
1
0
40
I
I
= 5.0 mA
0
1
2
3
4
5
6
20
-60 -40 -20
0
20
40
60
80 100
I
F
– FORWARD INPUT CURRENT – mA
T
A
– TEMPERATURE – °C
Figure 4. Typical Output Voltage vs.
Forward Input Current.
Figure 5. Typical Low Level Output
Current vs. Temperature.
1-322