Electrical Specifications
Test conditions that are not specified can be anywhere within the recommended operating range. All typical
specifications are at TA = +25°C, VDD1 = VDD2 = +5 V.
Parameter
Symbol
Min.
Typ.
Max. Units
Test Conditions
mA VI = 0 V
mA VI = VDDI
Fig. Note
DC Specifications
Logic Low Input
Supply Current
Logic High Input
Supply Current
IDD1L
IDD1H
6.0
1.5
10.0
3.0
2
Input Supply Current
Output Supply Current
Input Current
Logic High Output
Voltage
IDD1
IDD2
II
13.0
11.0
10
mA
mA
µA
V
5.5
-10
VDD2 - 0.1
VOH
VDD2
IO = -20 µA, VI = VIH 1, 2
0.8 *VDD2 VDD2 - 0.5
IO = -4 mA, VI = VIH
IO = 20 µA, VI = VIL
IO = 4 mA, VI = VIL
Logic Low Output
Voltage
VOL
0
0.5
0.1
1.0
V
Switching
Propagation Delay Time
to Logic Low Output
Propagation Delay Time
to Logic High Output
Pulse Width
Specifications
tPHL
tPLH
PW
20
40
40
ns
CL = 15 pF
CMOS Signal Levels
3, 7
3
4
23
80
Data Rate
12.5 MBd
Pulse Width Distortion
PWD
3
8
ns
CL = 15 pF
CMOS Signal Levels
4, 8
5, 9
5
6
|tPHL - tPLH
|
Propagation Delay Skew
Output Rise Time
(10 - 90%)
Output Fall Time
(90 - 10%)
tPSK
tR
20
9
8
CL = 15 pF
CMOS Signal Levels
tF
6,
10
Common Mode
Transient Immunity at
Logic High Output
Common Mode
Transient Immunity at
Logic Low Output
Input Dynamic Power
Dissipation
Capacitance
Output Dynamic Power
Dissipation
|CMH|
10
10
20
20
60
10
kV/µs VI = VDD1, VO >
0.8 VDD1
7
8
,
VCM = 1000 V
VI = 0 V, VO > 0.8 V,
VCM = 1000 V
|CML|
CPD1
pF
CPD2
Capacitance
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