8905
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
TERMINAL FUNCTIONS
Term.
1
2
3
4
5
6-7
8
9
10
11
Terminal Name
LOAD SUPPLY
C
D2
C
WD
C
ST
OUT
A
GROUND
OUT
B
OUT
C
CENTERTAP
BRAKE
Function
V
BB
; the 5 V or 12 V motor supply.
One of two capacitors used to generate the ideal commutation points from the back-EMF
zero-crossing points.
Timing capacitor used by the watchdog circuit to disable the back-EMF comparators
during commutation transients, and to detect incorrect motor position.
Startup oscillator timing capacitor.
Power amplifier output A to motor.
Power and logic ground and thermal heat sink.
Power amplifier output B to motor.
Power amplifier output C to motor.
Motor centertap connection for back-EMF detection circuitry.
Active low turns ON all three sink drivers shorting the motor windings to ground. External
capacitor and resistor at B
RAKE
provide brake delay. The brake function can also be
controlled via the serial port.
External reservoir capacitor used to hold charge to drive the source drivers’ gates. Also
provides power for brake circuit.
Analog voltage input to control motor current. Also, compensation node for internal speed
control loop.
External tachometer input.
V
DD
; the 5 V logic supply.
Clock input for the speed reference counter. Typical max. frequency is 10 MHz.
Thermal shutdown indicator, FCOM, TACH, or SYNC signals available in real time,
controlled by 2-bit multiplexer in serial port.
Power and logic ground and thermal heat sink.
When pulled low forces the chip into sleep mode; clears all serial port bits.
Strobe input (active low) for data word.
Clock input for serial port.
Sequential data input for the serial port.
One of two capacitors used to generate the ideal commutation points from the back-EMF
zero-crossing points.
12
13
14
15
16
17
18-19
20
21
22
23
24
C
RES
FILTER
INDEX
LOGIC SUPPLY
OSCILLATOR
DATA OUT
GROUND
RESET
CHIP SELECT
CLOCK
DATA IN
C
D1
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
