PPC405EX – PowerPC 405EX Embedded Processor
Revision 1.09 - August 21, 2007
Preliminary Data Sheet
Table 2. DCR Address Map
Function
Total DCR Address Space
1
Reserved
CPR (Clocking, Power-on Reset)
System DCRs
DDR 1/2 SDRAM Controller
External Bus Controller (EBC)
External Bus Master (EBM)
Reserved
PLB4XAHB Bridge
Reserved
PCI Express 0
PCI Express 1
PLB4 Arbiter
PLB-to-OPB Bridge
OPB-to-PLB Bridge
Reserved
Power Management
Reserved
UIC 0
UIC 1
UIC 2
Reserved
DMA
Reserved
Ethernet MAL
Reserved
Start Address (Hex)
0x000
000
00C
00E
010
012
014
016
020
030
040
060
080
090
0A0
0A8
0B0
0B3
0C0
0D0
0E0
0F0
100
140
180
200
End Address (Hex)
0x3FF
00B
00D
00F
011
013
015
01F
02F
03F
05F
07F
08F
09F
0A7
0AF
0B2
0BF
0CF
0DF
0EF
0FF
13F
17F
1FF
3FF
128W
64W
16W
16W
16W
3W
32W
32W
16W
16W
8W
16W
2W
2W
2W
2W
2W
Size
1KW (4KB)
1
Notes:
1. A DCR address is 10 bits (1024 or 1K unique addresses). Each unique address represents a single 32-bit (word) register, or one kiloword
(KW) (which equals 4KB).
AMCC Proprietary
7
AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
