Am188™ER MICROCONTROLLER BLOCK DIAGRAM
INT2/INTA0
INT3/INTA1/IRQ
INT4
INT1/SELECT
CLKOUTA
TMROUT0
TMROUT1
INT0
NMI
TMRIN0 TMRIN1
DRQ0
DRQ1
CLKOUTB
DMA
Unit
Timer Control
Unit
X2
X1
0
1 (WDT)
2
0
1
Clock and
Power
Management
20-Bit Source
Pointers
20-Bit Destination
Pointers
Max Count B
Registers
Interrupt
Control Unit
Execution
Unit
Max Count A
V
CC
Registers
16-Bit Count
Registers
Control
Watchdog
Timer (WDT)
16-Bit Count
Registers
GND
Control
Control
Control
Registers
Registers
Registers
Registers
PIO
Unit
PIO31–
PIO0*
RES
Control
Registers
Refresh
Control
Unit
Control
Registers
Control
Registers
PSRAM
Control
Unit
ARDY
SRDY
S2
TXD
RXD
Asynchronous
Serial Port
S1/IMDIS
S0/SREN
DT/R
32 Kbyte
SRAM
(32K x 8)
Bus
Interface
Unit
Chip-Select
Unit
Control
Registers
DEN
HOLD
HLDA
Synchronous Serial
Interface
S6/
CLKSEL1
UZI/
CLKSEL2
RD
SDATA
SCLK
A19–A0
AO15–AO8
AD7–AD0
SDEN0 SDEN1
LCS/ONCE0
MCS3/RFSH
MCS2–MCS0
UCS/ONCE1
PCS6/A2
PCS5/A1
PCS3–PCS0
WB
WR
RFSH2/ADEN
ALE
Notes:
* All PIO signals are shared with other physical pins. See the pin descriptions beginning on page 30 and Table 3 on page 36 for
information on shared functions.
Am186TMER and Am188TMER Microcontrollers Data Sheet
3
AMD [ AMD ]
