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AM186ESLV-40KC/W 参数 Datasheet PDF下载

AM186ESLV-40KC/W图片预览
型号: AM186ESLV-40KC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能, 80C186- / 80C188兼容和80L186- / 80L188兼容的16位嵌入式微控制器 [High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers]
分类和应用: 微控制器
文件页数/大小: 102 页 / 1514 K
品牌: AMD [ AMD ]
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PRELIMINARY  
TM  
TM  
Am186 ES/ESLV and Am188 ES/ESLV  
High Performance, 80C186-/80C188-Compatible and  
80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers  
DISTINCTIVE CHARACTERISTICS  
n E86 family 80C186-/188- and 80L186-/188-  
compatible microcontrollers with enhanced bus  
interface  
— Multidrop 9-bit serial port protocol  
— Independent serial port baud rate generators  
— DMA to and from the serial ports  
— Lower system cost with higher performance  
— Watchdog timer can generate NMI or reset  
— A pulse-width demodulation option  
— 3.3-V ±0.3-V operation (Am186ESLV and  
Am188ESLV microcontrollers)  
— A data strobe, true asynchronous bus interface  
option included for DEN  
n High performance  
— 20-, 25-, 33-, and 40-MHz operating frequencies  
— Pseudo static RAM (PSRAM) controller includes  
auto refresh capability  
— Supports zero-wait-state operation at 25 MHz  
with 100-ns static memory (Am186ESLV and  
Am188ESLV microcontrollers) and 40 MHz with  
70-ns static memory (Am186ES and Am188ES  
microcontrollers)  
— Reset configuration register  
n Familiar 80C186/80L186 peripherals  
— Two independent DMA channels  
— Programmable interrupt controller with up to  
eight external and eight internal interrupts  
— 1-Mbyte memory address space  
— 64-Kbyte I/O space  
— Three programmable 16-bit timers  
n Enhanced features provide improved memory  
access and remove the requirement for a 2x clock  
input  
— Programmable memory and peripheral  
chip-select logic  
— Programmable wait state generator  
— Power-save clock divider  
— Nonmultiplexed address bus  
— Processor operates at the clock input frequency  
n Software-compatible with the 80C186/80L186  
and 80C188/80L188 microcontrollers with widely  
available native development tools,  
— On the Am186ES/ESLV microcontroller, 8-bit or  
16-bit memory and I/O static bus option  
n Enhanced integrated peripherals provide  
increased functionality, while reducing system  
cost  
applications, and system software  
n A compatible evolution of the Am186 EM and  
Am188 EM microcontrollers  
— Thirty-two programmable I/O (PIO) pins  
n Available in the following packages:  
— 100-pin, thin quad flat pack (TQFP)  
— 100-pin, plastic quad flat pack (PQFP)  
— Two full-featured asynchronous serial ports allow  
full-duplex, 7-bit, 8-bit, or 9-bit data transfers  
— Serial port hardware handshaking with CTS,  
RTS, ENRX, and RTR selectable for each port  
GENERAL DESCRIPTION  
The Am186 ES/ESLV and Am188 ES/ESLV  
microcontrollers are an ideal upgrade for 80C186/188 and  
80L186/188 microcontroller designs requiring 80C186/188  
and 80L186/188 compatibility, increased performance,  
serial communications, and a direct bus interface.  
The Am186ES/ESLV and Am188ES/ESLV  
microcontrollers have been designed to meet the most  
common requirements of embedded products  
developed for the office automation, mass storage, and  
communications markets. Specific applications include  
disk drives, hand-held and desktop terminals, set-top  
controllers, fax machines, printers, photocopiers,  
feature phones, cellular phones, PBXs, multiplexers,  
modems, and industrial controls.  
The Am186ES/ESLV and Am188ES/ESLV microcontrollers  
are part of the AMD E86 family of embedded  
microcontrollers and microprocessors based on the x86  
architecture. The E86 family includes the 16- and 32-bit  
microcontrollers and microprocessors described on page 8.  
This document contains information on a product under development at Advanced Micro Devices. The information  
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed  
product without notice.  
Publication# 20002 Rev: B Amendment/0  
Issue Date: February 1997