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AAT1152_06 参数 Datasheet PDF下载

AAT1152_06图片预览
型号: AAT1152_06
PDF下载: 下载PDF文件 查看货源
内容描述: 850kHz的1A降压DC / DC转换器 [850kHz 1A Buck DC/DC Converter]
分类和应用: 转换器
文件页数/大小: 17 页 / 655 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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AAT1152  
850kHz 1A Buck DC/DC Converter  
For a 1A load and the ripple set to 30% at the max-  
imum input voltage, the maximum peak-to-peak  
ripple current is 300mA. The inductance value  
required is 3.9μH.  
Input Capacitor  
The primary function of the input capacitor is to pro-  
vide a low impedance loop for the edges of pulsed  
current drawn by the AAT1152. A low ESR/ESL  
ceramic capacitor is ideal for this function. To mini-  
mize the stray inductance, the capacitor should be  
placed as closely as possible to the IC. This keeps  
the high frequency content of the input current local-  
ized, minimizing radiated and conducted EMI while  
facilitating optimum performance of the AAT1152.  
Ceramic X5R or X7R capacitors are ideal for this  
function. The size required will vary depending on  
the load, output voltage, and input voltage source  
impedance characteristics. A typical value is around  
10μF. The input capacitor RMS current varies with  
the input voltage and output voltage. The equation  
for the RMS current in the input capacitor is:  
VOUT  
IO k FS  
VOUT  
L =  
L =  
1 -  
VIN  
1.5  
V
1.5V  
4.2V  
1 -  
1.0A 0.3 830kHz  
L = 3.9μH  
The factor "k" is the fraction of full load selected for  
the ripple current at the maximum input voltage.  
The corresponding inductor RMS current is:  
ΔI2  
12  
2
VO  
VIN  
VO ⎞  
VIN ⎠  
IRMS  
=
IO  
+
IO =1A  
IRMS = IO ⋅  
1 -  
ΔI is the peak-to-peak ripple current which is fixed by  
the inductor selection above. For a peak-to-peak cur-  
rent of 30% of the full load current, the peak current  
at full load will be 115% of the full load. The 4.1μH  
inductor selected from the Sumida CDRH5D18  
series has a 57mΩ DCR and a 1.95A DC current rat-  
ing. At full load, the inductor DC loss is 57mW, which  
amounts to a 3.8% loss in efficiency.  
The input capacitor RMS ripple current reaches a  
maximum when VIN is two times the output voltage  
where it is approximately one half of the load cur-  
rent. Losses associated with the input ceramic  
capacitor are typically minimal and are not an issue.  
Proper placement of the input capacitor can be seen  
in the reference design layout in Figures 5 and 6.  
Figure 5: AAT1152 Evaluation  
Board Layout Top Layer.  
Figure 6: AAT1152 Evaluation  
Board Layout Bottom Layer.  
12  
1152.2006.09.1.7