欢迎访问ic37.com |
会员登录 免费注册
发布采购

AAT1155IKS-1.8-T1 参数 Datasheet PDF下载

AAT1155IKS-1.8-T1图片预览
型号: AAT1155IKS-1.8-T1
PDF下载: 下载PDF文件 查看货源
内容描述: 1MHz的2.5A降压型DC / DC转换器 [1MHz 2.5A Step-Down DC/DC Converter]
分类和应用: 转换器
文件页数/大小: 17 页 / 389 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
 浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第8页浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第9页浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第10页浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第11页浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第13页浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第14页浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第15页浏览型号AAT1155IKS-1.8-T1的Datasheet PDF文件第16页  
AAT1155  
1MHz 2.5A Step-Down DC/DC Converter  
A high ESR tantalum capacitor with a value about 10  
times the input ceramic capacitor may also be  
required when using a 10µF or smaller ceramic input  
bypass capacitor. This dampens any input oscilla-  
tions that may occur due to the source inductance  
resonating with the converter input impedance.  
Due to the ESR zero associated with the tantalum  
capacitor, smaller values than those required with  
ceramic capacitors provide more phase margin  
with a greater loop crossover frequency.  
Layout  
Figures 3 and 4 display the suggested PCB layout  
for the AAT1155. The following guidelines should  
be used to help ensure a proper layout.  
Output Capacitor  
With no external compensation components, the out-  
put capacitor has a strong effect on the loop stability.  
Larger output capacitance will reduce the crossover  
frequency with greater phase margin. A 200µF  
ceramic capacitor provides sufficient bulk capacitance  
to stabilize the output during large load transitions and  
has ESR and ESL characteristics necessary for very  
low output ripple. The RMS ripple current is given by:  
1. The connection from the input capacitor to the  
Schottky anode should be as short as possible.  
2. The input capacitor should connect as closely  
as possible to VP (Pins 5 and 8) and GND  
(Pin 2).  
3. C1, L1, and CR1 should be connected as  
closely as possible. The connection from the  
cathode of the Schottky to the LX node  
should be as short as possible.  
4. The feedback trace (Pin 1) should be separate  
from any power trace and connect as closely  
as possible to the load point. Sensing along a  
high-current load trace can degrade DC load  
regulation.  
(VOUT+VFWD)·(V - VOUT  
)
1
IN  
IRMS  
=
·
L·F·V  
2 · 3  
IN  
For a ceramic output capacitor, the dissipation due  
to the RMS current and associated output ripple  
are negligible.  
5. The resistance of the trace from the load  
return to the ground (Pin 2) should be kept to  
a minimum. This will help to minimize any  
error in DC regulation due to differences in  
the potential of the internal reference ground  
and the load return.  
Tantalum capacitors with sufficiently low ESR to  
meet output ripple requirements generally have an  
RMS current rating much greater than that actually  
seen in this application. The maximum tantalum  
output capacitor ESR is:  
6. R1 and C3 are required in order to provide  
a cleaner power source for the AAT1155 con-  
trol circuitry.  
VRIPPLE  
ESR ≤  
I  
where I is the peak-to-peak inductor ripple current.  
Figure 3: Evaluation Board Top Side.  
Figure 4: Evaluation Board Bottom Side.  
12  
1155.2005.11.1.6