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AAT1232 参数 Datasheet PDF下载

AAT1232图片预览
型号: AAT1232
PDF下载: 下载PDF文件 查看货源
内容描述: 24V 100毫安升压转换器 [24V 100mA Step-Up Converter]
分类和应用: 转换器升压转换器
文件页数/大小: 17 页 / 438 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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24V 100mA Step-Up Converter
The magnitude of the feedback error signal deter-
mines the average input current. Therefore, the
AAT1232 controller implements a programmed
current source connected to the output capacitor
and load resistor. There is no right-half plane zero,
and loop stability is easily achieved with no addi-
tional compensation components.
Increased load current results in a drop in the out-
put feedback voltage (FB1 or FB2) sensed through
the feedback resistors (R1, R2, R3). The controller
responds by increasing the peak inductor current,
resulting in higher average current in the inductor.
Alternatively, decreased output load results in an
increase in the output feedback voltage (FB1 or
FB2 pin). The controller responds by decreasing
the peak inductor current, resulting in lower aver-
age current in the inductor.
At light load, the inductor OFF interval current goes
below zero and the boost converter enters discon-
tinuous mode operation. Further reduction in the
load results in a corresponding reduction in the
switching frequency. AAT1232 pulsed frequency
operation reduces switching losses and maintains
high efficiency at light loads.
Operating frequency varies with changes in the
input voltage, output voltage, and inductor size.
Once the boost converter has reached continuous
mode, further increases in the output load will not
significantly increase the operating frequency. A
small 2.2µH (±20%) inductor is selected to maintain
high frequency switching (up to 2MHz) and high
efficiency operation for outputs from 10V to 24V.
AAT1232
Alternatively, the output voltage may be pro-
grammed to any of 16 voltage levels using the
S
2
Cwire serial digital input. The single wire
S
2
Cwire interface provides high-speed output volt-
age programmability across a 2X output voltage
range. S
2
Cwire functionality is enabled by pulling
the SEL pin low and providing S
2
Cwire input to the
EN/SET pin. Table 2 details the FB2 reference
voltage versus S
2
Cwire rising edges.
Soft Start / Enable
The input disconnect switch is activated when a
valid input voltage is present and the EN/SET pin
is pulled high. The slew rate control on the P-chan-
nel MOSFET ensures minimal inrush current as
the output voltage is charged to the input voltage,
prior to switching of the N-channel power MOS-
FET. Monotonic turn-on is guaranteed by the built-
in soft-start circuitry. Soft-start eliminates output
voltage overshoot across the full input voltage
range and all loading conditions.
Current Limit and Over-Temperature
Protection
The switching of the N-channel MOSFET termi-
nates when current limit of 3.0A (typical) is exceed-
ed. This minimizes power dissipation and compo-
nent stresses under overload and short-circuit con-
ditions. Switching resumes when the current
decays below the current limit.
Thermal protection disables the AAT1232 when
internal dissipation becomes excessive. Thermal
protection disables both MOSFETs. The junction
over-temperature threshold is 140°C with 15°C of
temperature hysteresis. Once an over-temperature
or over-current fault condition is removed, the output
voltage automatically recovers.
Output Voltage Programming
The output voltage may be programmed through a
resistor divider network located from output capaci-
tor to FB1/FB2 pins to ground. Pulling the SEL pin
high activates the FB1 pin which maintains a 1.2V
reference voltage, while the FB2 reference is dis-
abled. Pulling the SEL pin low activates the FB2 pin
which maintains a 0.6V reference, while the FB1
reference is disabled. This function allows dynam-
ic selection between two distinct output voltages
across a 2X range (maximum). An additional resis-
tor between FB1 and FB2 allows the designer to
program the outputs across a reduced <2X range.
Under-Voltage Lockout
Internal bias of all circuits is controlled via the V
IN
input. Under-voltage lockout (UVLO) guarantees
sufficient V
IN
bias and proper operation of all inter-
nal circuitry prior to activation.
1232.2006.12.1.3
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