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AAT3177 参数 Datasheet PDF下载

AAT3177图片预览
型号: AAT3177
PDF下载: 下载PDF文件 查看货源
内容描述: 大电流,高效率电荷泵与自动定时器 [High Current, High Efficiency Charge Pump with Auto-Timer]
分类和应用:
文件页数/大小: 16 页 / 771 K
品牌: ANALOGICTECH [ ADVANCED ANALOGIC TECHNOLOGIES ]
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PRODUCT DATASHEET
AAT3177
ChargePump
TM
High Current, High Efficiency Charge Pump with Auto-Timer
Functional Block Diagram
C1+
C1-
C2+
C2-
VIN
Charge Pump
Section 1
Charge Pump
Section 2
1MHz
Oscillator
Soft-Start
Control
OUT
FL
EN/SET
System Control;
S
2
Cwire;
Timing
RSET
CT
GND
Functional Description
The AAT3177 is a high efficiency, low noise, dual stage
tri-mode 1X/1.5X/2X charge pump device intended for
photo-flash LED applications. The device requires only
four external components: two ceramic capacitors for
the charge pump flying capacitors, one ceramic capacitor
for C
IN
, and one ceramic capacitor for C
OUT
.
The charge pump is designed to deliver regulated load
currents up to 800mA. The dual stage charge pump sec-
tion contains soft-start circuitry to prohibit excessive
inrush current during start-up. System efficiency is
maximized with a tri-mode, dual stage charge pump
topology. The internal clock oscillator at 1MHz allows the
use of small external components.
The tri-mode charge pump operation further optimizes
power conversion efficiency. Depending upon the vari-
ance of load current (at different modes), input voltage,
and nominal LED forward voltage, the charge pump will
operate in a 1X, 1.5X, or 2X mode to generate the output
voltage required to power the load for a given controlled
constant current. This results in significant power sav-
ings over voltage doubling architectures, especially when
the LEDs are also operated at lower current levels in
movie, viewing, or flashlight modes.
S
2
Cwire Serial Interface
The AAT3177 utilizes Analogic Tech’s single wire S
2
Cwire
interface to enable/disable the charge pump and adjust
the output current at 16 current levels. Each code defines
the output current to be a percentage of the maximum
current set by the resistor at the R
SET
pin (see Table 1).
The S
2
Cwire interface records rising edges of the EN/SET
pin and decodes them into 16 individual current level
settings with Code 1 reserved for maximum current.
Once EN/SET has been held in the logic high state for
time T
LAT
(500μs), the programmed current is seen at the
current source outputs and the internal data register is
reset to 0. For subsequent current level programming,
the number of rising edges corresponding to the desired
code must be applied on the EN/SET pin.
8
www.analogictech.com
3177.2008.06.1.0