APLUS INTEGRATED CIRCUITS INC.
BIT - 1
=1
APC5800E
E
NTRY SLEEP MODE
. I
N SLEEP MODE
,
THE BOTH OF MAIN
SYSTEM CLOCK AND
32768H
Z WILL BESTOPPED
,
SO ALL
FUNCTION ARE STOPPED AND ONLY EXTERNAL INTERRUPT
CAN WAKE UP THIS CHIP
BIT – 3 ~ 2
00 :
SYSTEM CLOCK
= F
XOSC
/2 X 256(4.19MH
Z
)(
DEFAULT
).
01 :
SYSTEM CLOCK
= F
XOSC
/2 X 512(8.38MH
Z
)
10 :
SYSTEM CLOCK
= F
XOSC
/2 X 768(12.58MH
Z
)
BIT- 7 ~ 4
0
XXX
: F
IX
-
TIMER DISABLE
.
1000 : F
IX
-
TIMER
= 64H
Z
.
1001 : F
IX
-
TIMER
= 32H
Z
.
1010 : F
IX
-
TIMER
= 16H
Z
.
1011 : F
IX
-
TIMER
= 8H
Z
.
1100 : F
IX
-
TIMER
= 4H
Z
.
1101 : F
IX
-
TIMER
= 2H
Z
.
1110 : F
IX
-
TIMER
= 1H
Z
.
1111 : F
IX
-
TIMER
= 0.5H
Z
3FE3
: P
ORT
_
A
[7..0]
INTERRUPT ENABLE REGISTER
. W
RITE ONLY
.
A
N
‘0’
IN THIS REGISTER WILL SET THE INTERRUPT FUNCTION OF THE CORRESPONDING PIN OF
PORT
_
A TO BE ENABLED
. T
HE DEFAULT VALUE FOR EACH BIT IS
‘1’.
3FE4
: P
ORT
_
A
[7..0]
DATA REGISTER
. R
EAD AND WRITE
.
3FE5 :
P
ORT
_
A
[7..0]
DIRECTION REGISTER
. W
RITE ONLY
.
A
N
‘1’
IN THIS REGISTER WILL SET THE CORRESPONDING PIN OF PORT
_
A TO BE OUTPUT
.
T
HE DEFAULT VALUE FOR EACH BIT IS ZERO
.
3FE6:
P
ORT
_
B
[7..0]
DATA REGISTER
. W
RITE ONLY
.
3FE7 :
C
LEAR WATCHDOG TIMER
. W
RITE ONLY
.
T
HE WATCHDOG TIMER RESET WILL HAPPEN IF THE PROGRAMMER DO NOT CLEAR THE
WATCHDOG TIMER BEFORE WATCHDOG TIMER TIME
-
OUT
.
3FE8
V
OICE CHANNEL
0
LOW BYTE
. W
RITE ONLY
.
B
IT
2-0 : R
ESERVED
.
B
IT
3:
NO USE
(
MUST
0)
B
IT
7-4: = V
OICE CHANNEL
0
LOW NIBBLE BYTE
.
3FE9
: V
OICE CHANNEL
0
HIGH BYTE
. W
RITE ONLY
.
T
HE RESOLUTION OF VOICE CHANNEL
0
IS
12
BITS
($3FE9,$3FE8
BIT
7_4).
www.aplusinc.com.tw
7
TEL : 886-2-2782-9266
APLUS [ APLUS INTERGRATED CIRCUITS ]
