Features
•
8-Bit Multiplexed Addresses/Outputs
•
Fast Read Access Time - 90 ns
•
Dual Voltage Range Operation
•
•
•
•
•
•
•
– Low-Voltage Power Supply Range, 3.0V to 3.6V, or
– Standard 5V
±
10% Supply Range
Low Power CMOS Operation
– 20
µ
A max. Standby for ALE = V
IH
and V
CC
= 3.6V
– 29 mW max. Active at 5 MHz for V
CC
= 3.6V
20-Lead TSSOP Package
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid
™
Programming Algorithm - 50
µ
s/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL
Integrated Product Identification Code
Commercial and Industrial Temperature Range
Description
The AT27LV520 is a low-power, high-performance 524,288-bit one-time programma-
ble read only memory (OTP EPROM) organized 64K by 8 bits. It incorporates latches
for the 8 lower order address bits to multiplex with the 8 data bits. This minimizes sys-
tem chip count, reduces cost, and simplifies the design of multiplexed bus systems. It
requires only one power supply in the range of 3.0V to 3.6V for normal read mode
operation, making it ideal for fast, portable systems using battery power. Any byte can
be accessed in less than 90 ns.
The AT27LV520 is available in 173 mil, 20-pin TSSOP, 300 mil, 20-pin SOIC and 28-
pin TSOP, one-time programmable (OTP) plastic packages.
(continued)
512K (64K x 8)
Multiplexed
Addresses/
Outputs
Low Voltage
OTP EPROM
AT27LV520
Pin Configurations
Pin Name
A8 - A15
AD0 - AD7
OE /V
PP
ALE
Function
Addresses
Addresses/Outputs
Output Enable/V
PP
Address Latch Enable
TSOP Top View
A10
NC
NC
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
NC
NC
A9
22
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A8
NC
NC
AD1
AD3
AD5
AD7
GND
AD6
AD4
AD2
NC
NC
AD0
TSSOP Top View
A10
A12
A14
ALE
VCC
OE/VPP
A15
A13
A11
A9
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
A8
AD1
AD3
AD5
AD7
GND
AD6
AD4
AD2
AD0
SOIC Top View
OE/VPP
A15
A13
A11
A9
AD0
AD2
AD4
AD6
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
ALE
A14
A12
A10
A8
AD1
AD3
AD5
AD7
Rev. 0911B-B–01/98
1