2. Overview
ATtiny24A/44A are low-power CMOS 8-bit microcontrollers based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATtiny24A/44A
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize
power consumption versus processing speed.
Figure 2-1.
VCC
8-BIT DATABUS
INTERNAL
OSCILLATOR
GND
PROGRAM
COUNTER
STACK
POINTER
Block Diagram
INTERNAL
CALIBRATED
OSCILLATOR
WATCHDOG
TIMER
MCU CONTROL
REGISTER
TIMING AND
CONTROL
PROGRAM
FLASH
SRAM
INSTRUCTION
REGISTER
GENERAL
PURPOSE
REGISTERS
X
Y
Z
MCU STATUS
REGISTER
TIMER/
COUNTER0
TIMER/
COUNTER1
INSTRUCTION
DECODER
CONTROL
LINES
ALU
STATUS
REGISTER
INTERRUPT
UNIT
PROGRAMMING
LOGIC
ISP INTERFACE
EEPROM
OSCILLATORS
ANALOG
COMPARATOR
DATA REGISTER
PORT A
DATA DIR.
REG.PORT A
ADC
DATA REGISTER
PORT B
DATA DIR.
REG.PORT B
+
-
PORT A DRIVERS
PORT B DRIVERS
PA7-PA0
PB3-PB0
The AVR core combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
4
ATtiny24A/44A
8183AS–AVR–12/08
ATMEL [ ATMEL CORPORATION ]
