HCPL-4504/J454/0454, HCNW4504
High CMR, High Speed Optocouplers
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
The HCPL-4504 and HCPL-0454 contain a GaAsP LED
while the HCPL-J454 and HCNW4504 contain an AlGaAs
LED. The LED is optically coupled to an integrated high
gain photo detector.
The HCPL-4504 series has short propagation delays and
high CTR. The HCPL-4504 series also has a guaranteed
propagation delay difference (t
PLH
-t
PHL
). These features
make the HCPL-4504 series an excellent solution to IPM
inverter dead time and other switching problems. The
CTR, propagation delay, and CMR are specified both for
TTL and IPM conditions which are provided for ease of
application. These single channel, diode-transistor opto-
couplers are available in 8-Pin DIP, SO-8, and Widebody
package configurations. An insulating layer between a
LED and an integrated photodetector provide electrical
insulation between input and output. Separate connec-
tions for the photodiode bias and output-transistor col-
lector increase the speed up to a hundred times that of
a conventional phototransistor coupler by reducing the
base collector capacitance.
Features
•
Short propagation delays for TTL and IPM applications
•
15 kV/μs minimum Common Mode Transient immu-
nity at V
CM
= 1500 V for TTL/load drive
•
High CTR at T
A
= 25°C
>25% for HCPL-4504/0454
>23% for HCNW4504
>19% for HCPL-J454
•
Electrical specifications for common IPM applications
•
TTL compatible
•
Open collector output
•
Safety approval:
UL recognized
– 3750 V rms/1min. for HCPL-4504/0454/J454
– 5000 V rms/1min. for HCPL-4504 Option 020 and
HCNW4504
CSA approved
IEC/EN/DIN EN 60747-5-2 approved
– V
IORM
= 560 Vpeak for HCPL-0454 Option 060
– V
IORM
= 630 Vpeak for HCPL-4504 Option 060
– V
IORM
= 891 Vpeak for HCPL-J454
– V
IORM
= 1414 Vpeak for HCNW4504
Functional Diagram
NC 1
ANODE 2
CATHODE 3
NC 4
8 V
CC
7 NC
6 V
O
5 GND
Applications
TRUTH TABLE
LED
V
O
LOW
ON
HIGH
OFF
A 0.1 μF bypass capacitor between pins 5 and 8 is recommended.
Schematic
I
CC
8
V
CC
+
ANODE
2
V
F
CATHODE
–
3
I
F
•
Inverter circuits and Intelligent Power Module (IPM)
interfacing: High Common Mode Transient immunity
(> 10 kV/μs for an IPM load/drive) and (t
PLH
- t
PHL
)
Specified (see Power Inverter Dead Time section)
•
Line receivers: Short propagation delays and low in-
put-output capacitance
•
High speed logic ground isolation: TTL/TTL, TTL/
CMOS, TTL/LSTTL
•
Replaces pulse transformers: Save board space and
weight
•
Analog signal ground isolation: Integrated photode-
tector provides improved linearity over phototransis-
tors
I
O
6
V
O
SHIELD
5
GND
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
AVAGO [ AVAGO TECHNOLOGIES LIMITED ]
