Circuit description (for optimum OIP3 across temperature)
Bill of Materials
Description
Circuit Symbol
L1
C1
L2
C2
L3
C3
C4
R1
Size
0402
0402
0402
0402
0402
0402
0402
0402
For 0.9GHz
(1)
22nH
8.2pF
47nH
8.2pF
39nH
150pF
0.1uF
0R
Toko
Kyocera
Toko
Kyocera
Toko
Murata
Murata
KOA
For 1.9GHz
(2)
4.3nH
1.5pF
3.9nH
3.0pF
NA
150pF
0.1uF
0R
Coilcraft
Murata
Toko
Kyocera
Not in use
Murata
Murata
KOA
For 2.4GHz
(3)
12nH
3.3pF
68nH
6.8pF
4.7nH
100pF
0.1uF
0R
Toko
Murata
Toko
Murata
Coilcraft
Murata
Murata
KOA
Input Matching Circuit
1.
Γ_mag
= 0.049,
Γ_ang
= -137.5°
2.
Γ_mag
= 0.388,
Γ_ang
= -135.4°
3.
Γ_mag
= 0.158,
Γ_ang
= -121.27°
Output Matching Circuit
1.
Γ_mag
= 0.066,
Γ_ang
= -93.5°
2.
Γ_mag
= 0.244,
Γ_ang
= 55.28°
3.
Γ_mag
= 0.122,
Γ_ang
= 74.18°
Figure 34. Demoboard and application circuit components table for Optimum OIP3
To bias the MGA-53589, a +5V supply is connected to the
output pin thru an inductor labeled as L2; which isolates
the in-band signal from the DC supply as shown in Figure
34. Capacitor C3 serves as an RF bypass for in-band signals
while C4 helps to eliminate out the band low frequency
signals. An optional R1 may be added to de-Q any resonance
created between C3 and C4. Typical values range from 2.2Ω
10
to 10Ω. A DC blocking capacitor C2, is used at the output
of the MMIC to isolate the supply voltage from succeeding
circuits. L3 can be added to improve the circuits ESD as well
as providing a better filtering output response. On its input,
the C1 acts as a DC blocking capacitor (to isolate supply
voltage from previous circuits) as well as with L1, creates a
filter response that remove low frequencies signals.
AVAGO [ AVAGO TECHNOLOGIES LIMITED ]
