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AZ100EL16VONB+ PDF Datasheet浏览和下载

型号:
AZ100EL16VONB+
PDF下载:
下载PDF文件
内容描述:
ECL / PECL振荡器增益级和缓冲区启用
[ECL/PECL Oscillator Gain Stage and Buffer with Enable]
文件大小:
259 K
文件页数:
18 Pages
品牌Logo:
品牌名称:
AZM [ ARIZONA MICROTEK, INC ]
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ARIZONA MICROTEK, INC.
AZ10EL16VO
AZ100EL16VO
ECL/PECL Oscillator Gain Stage and Buffer with Enable
FEATURES
Green and RoHS Compliant Available
250ps Propagation Delay on Q Output
¯
High Voltage Gain vs. Standard EL16
For Oscillator Applications
Available in 2x2 or 3x3mm MLP Package
75kΩ Enable Pull-Down Resistor
S–Parameter (.s2p) and IBIS Model
Files Available on Arizona Microtek Website
DESCRIPTION
The AZ10/100EL16VO is an oscillator gain stage with a high gain output buffer including an enable. The
Q
HG
/Q
HG
outputs have a voltage gain several times greater than the Q/Q outputs. An enable input (EN) allows
¯
¯
¯¯
continuous oscillator operation. When EN is LOW or floating (NC), input data is passed to both sets of outputs.
¯¯
When EN is HIGH, the Q
HG
/Q
HG
outputs will be forced LOW/HIGH respectively, while input data will continue to
¯¯
¯
be passed to the Q/Q outputs. The EN input can be driven with an ECL/PECL signal or a CMOS logic signal.
¯
¯¯
The input impedance of the D/D inputs remain constant for all operating modes since forcing the outputs via the
¯
EN pin does not power-down the chip but only disables the high gain Q
HG
/Q
HG
outputs.
¯¯
¯
Input protection diodes are included on the D/D inputs for enhanced ESD protection.
¯
The EL16VO also provides a V
BB
output that supports 1.5mA sink/source current. When used, the V
BB
pin
should be bypassed to ground or V
CC
via a 0.01μF capacitor.
Any used output must have an external pull down resistor. For 3.3V operation, an 180Ω resistor to V
EE
is
recommended if an AC coupled load is present. At 5.0V, a 330Ω resistor is recommended for the AC load case.
Alternately, a 50Ω load terminated to V
CC
– 2V or the Thevenin equivalent may be driven directly. Unused outputs
may be left floating (NC).
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.
PIN/PAD DESCRIPTION
Q
Q
D
D
EN
V
BB
Q
HG
Q
HG
PIN
D/D
¯
Q/Q
¯
Q
HG
/Q
HG
¯
V
BB
EN
¯¯
V
CC
V
EE
FUNCTION
Data Inputs
Data Outputs
Data Outputs w/High Gain
Reference Voltage Output
Enable Input
Positive Supply
Negative Supply
1630 S. STAPLEY DR., SUITE 127
MESA, ARIZONA 85204
USA
(480) 962-5881
FAX (480) 890-2541
www.azmicrotek.com