SPECIFICATIONS
All specifications TMIN to TMAX, AVDD = DVDD = +5V, fXIN = 1MHz, programmable gain amplifier setting of 1, Turbo Mode Rate of 1, REFOUT disabled, VBIAS disabled,
and external 2.5V reference, unless otherwise specified.
ADS1212U, P/ADS1213U, P, E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG INPUT
Input Voltage Range(1)
0
–10
+5
+10
V
V
MΩ
(2)
With VBIAS
Input Impedance
Programmable Gain Amplifier
Input Capacitance
G = Gain, TMR = Turbo Mode Rate
User Programmable: 1, 2, 4, 8, or 16
20/(G • TMR)(3)
1
16
5
5
pF
pA
nA
Input Leakage Current
At +25°C
TMIN to TMAX
50
1
SYSTEMS PERFORMANCE
No Missing Codes
fDATA = 10Hz
fDATA = 60Hz
22
19
21
20
20
18
Bits
Bits
Bits
Bits
Bits
Bits
%FSR
%FSR
fDATA = 100Hz, TMR of 4
fDATA = 250Hz, TMR of 8
fDATA = 500Hz, TMR of 16
DATA = 1000Hz, TMR of 16
fDATA = 60Hz
f
f
Integral Linearity
±0.0015
±0.0015
DATA = 1000Hz, TMR of 16
Unipolar Offset Error(4)
Unipolar Offset Drift(6)
Gain Error(4)
See Note 5
1
ppm/°C
See Note 5
Gain Error Drift(6)
4
100
ppm/°C
dB
dB
dB
dB
Common-Mode Rejection(9)
At DC, TMIN to TMAX
50Hz, fDATA = 50Hz(7)
60Hz, fDATA = 60Hz(7)
50Hz, fDATA = 50Hz(7)
60Hz, fDATA = 60Hz(7)
90
160
160
100
100
Normal-Mode Rejection
dB
Output Noise
See Typical Performance Curves
Power Supply Rejection
DC, 50Hz, and 60Hz
60
dB
VOLTAGE REFERENCE
Internal Reference (REFOUT
Drift
Noise
)
2.4
2.5
25
50
2.6
1
V
ppm/°C
µVp-p
mA
Ω
V
µA
V
ppm/°C
Load Current
Output Impedance
External Reference (REFIN
Load Current
VBIAS Output
Drift
Source or Sink
2
)
2.0
3.0
2.5
3.45
Using Internal Reference
Source or Sink
3.15
3.3
50
Load Current
10mA
DIGITAL INPUT/OUTPUT
Logic Family
TTL Compatible CMOS
Logic Level: (all except XIN
)
VIH
VIL
VOH
IIH = +5µA
IIL = +5µA
IOH = 2 TTL Loads
IOL = 2 TTL Loads
2.0
–0.3
2.4
DVDD +0.3
0.8
V
V
V
V
V
VOL
XIN Input Levels: VIH
VIL
XIN Frequency Range (fXIN
Output Data Rate (fDATA
0.4
DVDD +0.3
0.8
3.5
–0.3
0.5
0.96
0.48
2.4
V
)
2.5
MHz
Hz
Hz
Hz
)
User Programmable and TMR = 1 to 16
fXIN = 500kHz
6,250
3,125
15,625
fXIN = 2.5MHz
Data Format
User Programmable
Two’s Complement
or Offset Binary
SYSTEM CALIBRATION
Offset and Full-Scale Limits
VFS – | VOS
VFS = Full-Scale Differential Voltage(8) 0.7 • (2 • REFIN)/G
VOS = Offset Differential Voltage(8)
|
1.3 • (2 • REFIN)/G
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
2
ADS1212, 1213
BB [ BURR-BROWN CORPORATION ]
