PIN ASSIGNMENTS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NAME
ZERO1/GPO1
ZERO2/GPO2
ZERO3/GPO3
ZERO4/GPO4
ZERO5/GPO5
ZERO6/GPO6
AGND
V
CC
V
OUT
6
V
OUT
5
V
OUT
4
V
OUT
3
V
OUT
2
V
OUT
1
V
COM
2
V
COM
1
AGND6
V
CC
6
AGND5
V
CC
5
AGND4
V
CC
4
AGND3
V
CC
3
AGND2
V
CC
2
AGND1
V
CC
1
AGND0
V
CC
0
NC
NC
MDO
MDI
MC
ML
RST
SCKI
SCKO
BCK
LRCK
TEST
V
DD
DGND
DATA1
DATA2
DATA3
ZEROA
I/O
O
O
O
O
O
O
—
—
O
O
O
O
O
O
O
O
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
O
I
I
I
I
I
O
I
I
—
—
—
I
I
I
O
DESCRIPTION
Zero Data Flag for V
OUT
1. Can also be used as GPO pin.
Zero Data Flag for V
OUT
2. Can also be used as GPO pin.
Zero Data Flag for V
OUT
3. Can also be used as GPO pin.
Zero Data Flag for V
OUT
4. Can also be used as GPO pin.
Zero Data Flag for V
OUT
5. Can also be used as GPO pin.
Zero Data Flag for V
OUT
6. Can also be used as GPO pin.
Analog Ground
Analog Power Supply, +5V
Voltage Output for Audio Signal Corresponding to Rch on DATA3.
Voltage Output for Audio Signal Corresponding to Lch on DATA3.
Voltage Output for Audio Signal Corresponding to Rch on DATA2.
Voltage Output for Audio Signal Corresponding to Lch on DATA2.
Voltage Output for Audio Signal Corresponding to Rch on DATA1.
Voltage Output for Audio Signal Corresponding to Lch on DATA1.
Common Voltage Output. This pin should be bypassed with a 10µF capacitor to AGND.
Common Voltage Output. This pin should be bypassed with a 10µF capacitor to AGND.
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
Analog Ground
Analog Power Supply, +5V
No Connection. Must be open.
No Connection. Must be open.
Serial Data Output for Function Register Control Port
(3)
Serial Data Input for Function Register Control Port
(1)
Shift Clock for Function Register Control Port
(1)
Latch Enable for Function Register Control Port
(1)
System Reset, Active LOW
(1)
System Clock In. Input frequency is 128, 192, 256, 384, 512 or 768f
S
.
(2)
Buffered Clock Output. Output frequency is 128, 192, 256, 384, 512, or 768f
S
or one-half of 128, 192, 256, 384, 512,
or 768f
S.
Shift Clock Input for Serial Audio Data
(2)
Left and Right Clock Input. This clock is equal to the sampling rate, f
S
.
(2)
Test Pin. This pin should be connected to DGND.
(1)
Digital Power Supply, +3.3V
Digital Ground for +3.3V
Serial Audio Data Input for V
OUT
1 and V
OUT
2
(2)
Serial Audio Data Input for V
OUT
3 and V
OUT
4
(2)
Serial Audio Data Input for V
OUT
5 and V
OUT
6
(2)
Zero Data Flag. Logical “AND” of ZERO1 through ZERO6.
NOTES: (1) Schmitt-Trigger input with internal pull-down, 5V tolerant. (2) Schmitt-Trigger input, 5V tolerant. (3) Tri-state output.
®
5
PCM1604, PCM1605
BURR-BROWN [ BURR-BROWN CORPORATION ]
