PCM3060
www.ti.com
SLAS533–MARCH 2007
Table 1. TERMINAL FUNCTIONS
TERMINAL
NAME
I/O
DESCRIPTION
PIN
23
22
5
AGND1
–
–
ADC analog ground
DAC analog ground
AGND2
BCK1
I/O(1) Audio data bit clock input/output for ADC
I/O(1) Audio data bit clock input/output for DAC
BCK2
10
8
DGND
–
I(2)
O
Digital ground
DIN
12
3
Audio data digital input for DAC
Audio data digital output for ADC
DOUT
LRCK1
4
I/O(1) Audio data left/right clock input/output for ADC
I/O(1) Audio data left/right clock input/output for DAC
LRCK2
11
1
MC/SCL/FMT
MD/SDA/DEMP
I (2)
Mode control, clock for SPI, clock for I2C, format for H/W mode(5)
2
I/O(3) Mode control, data for SPI, data for I2C, de-emphasis for H/W mode
This pin provides four operation modes according to its input connection. Connected directly to
VDD: SPI mode. Connected to VDD through 220-kΩ pullup resistor: H/W mode, single-ended
VOUTX. Connected to DGND through 220-kΩ pulldown resistor: H/W mode, differential VOUTX.
Connected directly to DGND : I2C mode.
(4)
MODE
28
I
MS/ADR/IFMD
RST
27
15
6
I (2)
Mode control, select for SPI with low active, address for I2C, I/F mode for H/W mode
Reset and power-down control input, active-low
System clock input for ADC
(5)
I
SCKI1
SCKI2
SGND
VCC
I(2)
I(2)
–
9
System clock input for DAC
16
24
21
7
Shield analog ground
–
ADC, DAC analog power supply, 5-V
VCOM
–
ADC, DAC voltage common decoupling
VDD
–
Digital power supply, 3.3-V
VIN
L
25
26
19
20
14
13
17
18
I
Analog input to ADC, L-channel
VINR
I
Analog input to ADC, R-channel
VOUTL–
VOUTL+
ZEROL
ZEROR
VOUTR–
VOUTR+
O
O
O
O
O
O
Analog output from DAC, L-channel – in differential mode, must be open in single-ended mode
Analog output from DAC, L-channel + in differential mode, L-channel in single-ended mode
Zero flag, L-channel
Zero flag, R-channel
Analog output from DAC, R-channel – in differential mode, must be open in single-ended mode
Analog output from DAC, R-channel + in differential mode, R-channel in single-ended mode
(1) Schmitt-trigger input/output with 50-kΩ typical internal pulldown resistor
(2) Schmitt-trigger input, 5-V tolerant
(3) Schmitt-trigger input, 5 V tolerant for SPI, H/W mode and Schmitt-trigger input/open drain LOW output, 5-V tolerant for I2C
(4) VDD/2 biased, quad-state input
(5) Schmitt-trigger input with 50-kΩ typical internal pulldown resistor, 5-V tolerant
8
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