APPLICATION INFORMATION
Figure 1 shows the basic connection diagram for frequency-
to-voltage conversion. R
1
sets the input voltage range. For a
10V full-scale input, a 40kΩ input resistor is recommended.
Other input voltage ranges can be achieved by changing the
value of R
1
.
V
FS
R
1
=
(1)
0.25mA
R
1
should be a metal film type for good stability. Manufac-
turing tolerances can produce approximately
±10%
variation
in output frequency. Full-scale output frequency can be
trimmed by adjusting the value of R
1
—see Figure 3.
The full-scale output frequency is determined by C
1
. Values
shown in Figure 1 are for a full-scale output frequency of
10kHz. Values for other full-scale frequencies can be read
from Figure 2. Any variation in C
1
—tolerance, temperature
drift, aging—directly affect the output frequency. Ceramic
NPO or silver-mica types are a good choice.
For full-scale frequencies above 200kHz, use larger capaci-
tor values as indicated in Figure 2, with R
1
= 20kΩ.
The value of the integrating capacitor, C
2
, does not directly
influence the output frequency, but its value must be chosen
within certain bounds. Values chosen from Figure 2 produce
approximately 2.5Vp-p integrator voltage waveform. If C
2
’s
value is made too low, the integrator output voltage can
exceed its linear output swing, resulting in a nonlinear
response. Using C
2
values larger than shown in Figure 2 is
acceptable.
Accuracy or temperature stability of C
2
is not critical be-
cause its value does not directly affect the output frequency.
For best linearity, however, C
2
should have low leakage and
low dielectric absorption. Polycarbonate and other film
capacitors are generally excellent. Many ceramic types are
adequate, but some low-voltage ceramic capacitor types
may degrade nonlinearity. Electrolytic types are not recom-
mended.
FREQUENCY OUTPUT PIN
The frequency output terminal is an open-collector logic
output. A pull-up resistor is usually connected to a 5V logic
supply to create standard logic-level pulses. It can, however,
be connected to any power supply up to +V
CC
. Output pulses
have a constant duration and positive-going during the one-
shot period. Current flowing in the open-collector output
transistor returns through the Common terminal. This termi-
nal should be connected to logic ground.
f
O
V
INT
Pull-Up Voltage
0V
≤
V
PU
≤
+V
CC
0.1µF
V
INT
+5V
V
PU
≤
8mA
R
PU
+15V
C
2
10nF film
R
PU
4.7kΩ
f
OUT
One-Shot
0 to 10kHz
R
1
40kΩ
V
IN
0 to 10V
VFC32
0.1µF
Pinout shown is
for DIP or SOIC
packages.
–15V
C
1
3.3nF
NPO Ceramic
FIGURE 1. Voltage-to-Frequency Converter Circuit.
5
VFC32