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VSP3210Y 参数 Datasheet PDF下载

VSP3210Y图片预览
型号: VSP3210Y
PDF下载: 下载PDF文件 查看货源
内容描述: CCD信号处理器为扫描仪应用 [CCD SIGNAL PROCESSOR FOR SCANNER APPLICATIONS]
分类和应用:
文件页数/大小: 16 页 / 352 K
品牌: BURR-BROWN [ BURR-BROWN CORPORATION ]
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VSP
320
0
VSP3200
VSP3210
www.ti.com
CCD SIGNAL PROCESSOR FOR
SCANNER APPLICATIONS
FEATURES
F
INTEGRATED TRIPLE-CORRELATED
DOUBLE SAMPLER
F
OPERATION MODE SELECTABLE:
1-Channel, 3-Channel CCD Mode, 8Msps
F
PROGRAMMABLE GAIN AMPLIFIER:
0dB to +13dB
F
SELECTABLE OUTPUT MODES:
Normal/Demultiplexed
F
OFFSET CONTROL RANGE: ±500mV
F
+3V, +5V Digital Output
F
LOW POWER: 300mW (typ)
F
LQFP-48 SURFACE-MOUNT PACKAGE
DESCRIPTION
The VSP3200 and VSP3210 are complete CCD image
processors that operate from single +5V supplies.
This complete image processor includes three Corre-
lated Double Samplers (CDSs) and Programmable
Gain Amplifiers (PGAs) to process CCD signals.
The VSP3200 is interface compatible with the
VSP3210, which is a 16-bit, one-chip product.
The VSP3210 is pin-to-pin compatible with VSP3100,
when in demultiplexed output mode.
The VSP3200 and VSP3210 can be operated from 0°C
to +85°C, and are available in LQFP-48 packages.
CLP
CK1 CK2
ADCCK
TP0
V
REF
Reference
Circuit
Timing Generator
Clamp
RINP
CDS
AGND
6
PGA
CM
REFP
REFN
10
Clamp
GINP
10-Bit
DAC
OE
V
DRV
CDS
PGA
MUX
16-Bit
A/D
Converter
16
Digital
Output
Control
B0-B15
(A0-A2, D0-D9)
10
Clamp
BINP
10-Bit
DAC
6
CDS
PGA
Gain
Control
Register
R
3
Offset
Register
R
G
B
10
10-Bit
DAC
Configuration
Register
6
8
Register
Port
10
P/S
WRT
RD
SCLK
SD
G
B
6
VSP3200
Copyright © 2000, Texas Instruments Incorporated
SBMS012A
Printed in U.S.A. November, 2000