上海贝岭股½有限公司
上海贝岭股½有限公司
Shanghai Belling Co., Ltd.
BL22P14 USER MANUAL
BM22P14 用户手册
Write “0” to clear the bit, write “1” is null.
.0 RSTF0
0: no power on reset
1: power on reset
Write “0” to clear the bit, write “1” is null.
5.7 I/O PORTS
There are two group I/O ports: PA and PB. PA has 8 I/O ports and PB has 6 I/O ports. All
ports have pull up resistors. PA has the function of keyboard interrupt.
The control registers are PA, PB, DDRA, DDRB, KBIM and PBPR.
PA ($00): Data register of PORT A
.7-.0 PA[7:0]
PA is the data register for Port A.
DDRA($01): Data direction register of PORT A
.7-.0 DDRA[7:0] 00000000
DDRA is used to select data direction of PA.
When DDRAi is “0”, PAi is input; When DDRAi is “1”, PAi is output.
PB ($02): Data register of PORT B
.5-.0 PB[5:0]
PB is the data register for Port B.
DDRB($03): Data direction register of PORT B
.5-.0 DDRB[5:0]
DDRB is used to select data direction of PB.
When DDRBi is “0”, PBi is input; When DDRBi is “1”, PBi is output.
KBIM($04): Keyboard interrupt mask register
.7-.0 KBE[7:0]
KBIM is configured to enable keyboard interrupt. When KBEi is “1”, keyboard
interrupt of PAi is turn on, PAi keeps input and its pull up resistor is effective.
Besides, if needing keyboard interrupt active, KBIE (bit 3 of register of INTC0)
should be “1”. When KBEi is “0”, keyboard interrupt of PAi is turn off.
PBPR($05): PORTB pull-up register
.5-.0 PBP[5:0]
PBPR is configured to enable pull up resistors of PB. When PBPi is “0”, resistor
of PBi is ineffective. When PBPi is “1”, resistor of PBi is effective. When PB is output,
PBPR is no effect.
5.8 LCD
LCD drives 4*18 at most. When the clock of LCD comes from RTC oscillator or WDT
oscillator, LCD will still operate in stop mode.
LCD memory
The memory of LCD is located at 70H-79H. Any data written into 70H-79H will affect LCD
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