BL24C64 参数 Datasheet PDF下载

Shanghai Belling Corp., Ltd

Block Diagram

BL24C32/64

Functional Description

1.

Memory Organization

24C32, 32K SERIAL EEPROM:

The 32K is internally organized as 128 pages of 32 bytes each.

Random word addressing requires a 12-bit data word address.

24C64, 64K SERIAL EEPROM:

The 64K is internally organized as 256 pages of 32 bytes each.

Random word addressing requires a 13-bit data word address.

2.

Device Operation

CLOCK and DATA TRANSITIONS

:

The SDA pin is normally pulled high with an external device. Data on the

SDA pin may change only during SCL low time periods (see Figure 1). Data changes during SCL high periods will

indicate a start or stop condition as defined below.

3