BH616UV1611
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PIN DESCRIPTIONS
Name
Function
A0 to A19 Address Input (word mode)
These 20 address inputs select one of the 1,024K x 16 bit in the RAM, if BYTE is HIGH
A0 to A20 Address Input (byte mode)
These 21 address inputs select one of the 2,048K x 8 bit in the RAM, If BYTE is LOW
(TSOP only)
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when
CE1 Chip Enable 1 Input
data read from or write to the device. If either chip enable is not active, the device is
CE2 Chip Enable 2 Input
deselected and is in standby power mode. The DQ pins will be in the high impedance
state when the device is deselected.
WE Write Enable Input
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.
Lower byte and upper byte data input/output control pins.
OE Output Enable Input
LB and UB Data Byte Control Input
BYTE Byte Enable Input (TSOP only)
DQ0-DQ15 Data Input/Output
Ports
V
CC
V
SS
This input selects the organization of the SRAM. 1,024K x 16-bit configuration is
selected if BYTE is HIGH. 2,048K x 8-bit configuration is selected if BYTE is LOW
16 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
R0201-BH616UV1611
2
Revision 1.3
Otc.
2006
BSI [ BRILLIANCE SEMICONDUCTOR ]
