Ultra Low Power/High Speed CMOS SRAM
2M X 8 bit
Green package materials are compliant to RoHS
BH62UV1601
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FEATURES
Ÿ
Wide V
CC
low operation voltage : 1.65V ~ 3.6V
Ÿ
Ultra low power consumption :
V
CC
= 3.6V
Operation current : 12mA (Max.)at 55ns
2mA (Max.) at 1MHz
Standby current : 5.0uA (Typ.) at 3.0V/25
O
C
V
CC
= 1.2V
Data retention current : 2.5uA (Typ.) at 25
O
C
Ÿ
High speed access time :
-55
55ns (Max.) at V
CC
=1.65~3.6V
Ÿ
Automatic power down when chip is deselected
Ÿ
Easy expansion with CE1, CE2 and OE options
Ÿ
Three state outputs and TTL compatible
Ÿ
Fully static operation, no clock, no refresh
Ÿ
Data retention supply voltage as low as 1.0V
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DESCRIPTION
The BH62UV1601 is a high performance, ultra low power CMOS
Static Random Access Memory organized as 2,048K by 8 bits and
operates in a wide range of 1.65V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with typical operating current of
1.5mA at 1MHz at 3.6V/25
O
C and maximum access time of 55ns at
1.65V/85
O
C.
Easy memory expansion is provided by an active LOW chip enable
(CE1), an active HIGH chip enable (CE2) and active LOW output
enable (OE) and three-state output drivers.
The BH62UV1601 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The BH62UV1601 is made with two chips of 8Mbit SRAM by stacked
multi-chip-package.
The BH62UV1601 is available in 48-ball BGA package.
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POWER CONSUMPTION
POWER DISSIPATION
PRODUCT
FAMILY
OPERATING
TEMPERATURE
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
V
CC
=1.8V
10MHz
f
Max.
V
CC
=3.6V
V
CC
=1.8V
1MHz
V
CC
=3.6V
10MHz
f
Max.
1MHz
BH62UV1601AI
Industrial
-40
O
C to +85
O
C
30uA
25uA
2mA
6mA
12mA
1.5mA
5mA
8mA
BGA-48-0608
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PIN CONFIGURATIONS
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BLOCK DIAGRAM
1
A
B
C
D
E
F
G
H
NC
NC
DQ0
VSS
VCC
DQ3
NC
A18
2
OE
NC
NC
DQ1
DQ2
NC
A20
A8
3
A0
A3
A5
A17
NC
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CE1
NC
DQ5
DQ6
NC
WE
A11
6
CE2
NC
DQ4
VCC
VSS
DQ7
NC
A19
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
Address
Input
Buffer
10
Row
Decoder
1024
Memory Array
1024 x 16384
16384
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
Input
Buffer
8
2048
Column Decoder
11
Control
Address Input Buffer
8
Column I/O
Write Driver
Sense Amp
8
Data
Output
Buffer
CE1
CE2
WE
OE
V
CC
GND
A20 A19 A18 A17 A15 A14 A13 A16 A2 A1 A0
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to change products and specifications without notice.
Detailed product characteristic test report is available upon request and being accepted.
R0201-BH62UV1601
1
Revision 1.1
May
2006
BSI [ BRILLIANCE SEMICONDUCTOR ]
