BSI
FEATURES
Very Low Power/Voltage CMOS SRAM
1M x 16 or 2M x 8 bit switchable
BS616LV1622
• Wide Vcc operation voltage : 2.4 ~ 5.5V
• Very low power consumption :
Vcc = 3.0V C-grade: 45mA (@55ns) operating current
I -grade: 46mA (@55ns) operating current
C-grade: 36mA (@70ns) operating current
I -grade: 37mA (@70ns) operating current
3.0uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade: 113mA (@55ns) operating current
I -grade: 115mA (@55ns) operating current
C-grade: 90mA (@70ns) operating current
I -grade: 92mA (@70ns) operating current
15uA (Typ.) CMOS standby current
• High speed access time :
-55
55ns
-70
70ns
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1, CE2 and OE options
• I/O Configuration x8/x16 selectable by CIO, LB and UB pin
DESCRIPTION
The BS616LV1622 is a high performance, very low power CMOS Static
Random Access Memory organized as 1,048,676 words by 16 bits or
2,097,152 bytes by 8 bits selectable by CIO pin and operates in a wide
range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 3.0uA at 3V/25
o
C and maximum access time of 55ns at 3.0V/85
o
C .
This device provide three control inputs and three states output drivers
for easy memory expansion.
The BS616LV1622 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV1622 is available in 48-pin 12mmx20mm TSOP1 package.
PRODUCT FAMILY
PRODUCT FAMILY
OPERATING
TEMPERATURE
+0 C to +70 C
-40
O
C to +85
O
C
O
O
Vcc
RANGE
2.4V ~ 5.5V
2.4V ~ 5.5V
SPEED
(ns)
55ns : 3.0~5.5V
70ns : 2.7~5.5V
POWER DISSIPATION
STANDBY
Operating
(I
CCSB1
, Max)
(I
CC
, Max)
PKG TYPE
Vcc=3V
Vcc=5V
Vcc=3V
70ns
Vcc=5V
70ns
BS616LV1622TC
BS616LV1622TI
55 / 70
55 / 70
10uA
20uA
110uA
220uA
36mA
37mA
90mA
92mA
TSOP1-48
(12mmx20mm)
TSOP1-48
(12mmx20mm)
PIN CONFIGURATIONS
A4
A3
A2
A1
A0
/CE1
D0
D1
D2
D3
Vcc
CIO
Vss
D4
D5
D6
D7
A19
/WE
A18
A17
A16
A15
A14
1
48
47
46
A5
A6
A7
/OE
/UB
/LB
CE2
SAE
D15
D14
D13
D12
Vss
Vcc
D11
D10
D9
D8
A8
A9
A10
A11
A12
A13
BLOCK DIAGRAM
A19
A15
A14
A13
A12
A11
A10
A9
A8
A17
A7
A6
Address
Input
Buffer
24
Row
Decoder
4096
Memory Array
4096 x 4096
9
10
13
BS616LV1622TC
BS616LV1622T I
37
4096
D0
16(8)
Data
Input
Buffer
16(8)
Column I/O
16
17
.
.
.
.
D15
CE1
CE2
WE
OE
UB
.
.
.
.
Write Driver
16(8)
Sense Amp
256(512)
Column Decoder
16(8)
Data
Output
Buffer
27
24
25
16(18)
Control
Address Input Buffer
48-pin 12mmx20mm TSOP1 top view
LB
CIO
Vdd
Vss
A16 A0 A1 A2 A3 A4 A5 A18 (SAE)
Brilliance Semiconductor, Inc
. reserves the right to modify document contents without notice.
R0201-BS616LV1622
1
Revision 2.1
Jan.
2004
BSI [ BRILLIANCE SEMICONDUCTOR ]
