BS616LV4017
n
PIN DESCRIPTIONS
Name
A0-A17 Address Input
CE Chip Enable Input
Function
These 18 address inputs select one of the 262,144 x 16-bit in the RAM
CE is active LOW. Chip enable must be active when data read form or write to the
device. If chip enable is not active, the device is deselected and is in standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.
Lower byte and upper byte data input/output control pins.
WE Write Enable Input
OE Output Enable Input
LB and UB Data Byte Control Input
DQ0-DQ15 Data Input/Output
Ports
V
CC
V
SS
There 16 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
n
TRUTH TABLE
MODE
Chip De-selected
(Power Down)
CE
H
X
L
WE
X
X
H
H
OE
X
X
H
H
LB
X
H
L
X
L
UB
X
H
X
L
L
L
H
L
L
H
IO0~IO7
High Z
High Z
High Z
High Z
D
OUT
High Z
D
OUT
D
IN
X
D
IN
IO8~IO15
High Z
High Z
High Z
High Z
D
OUT
D
OUT
High Z
D
IN
D
IN
X
V
CC
CURRENT
I
CCSB
, I
CCSB1
I
CCSB
, I
CCSB1
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
Output Disabled
L
Read
L
H
L
H
L
L
Write
L
L
X
H
L
NOTES: H means V
IH
; L means V
IL
; X means don’t care (Must be V
IH
or V
IL
state)
R0201-BS616LV4017
2
Revision 1.3
May.
2006
BSI [ BRILLIANCE SEMICONDUCTOR ]
