BSI
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
BS616LV1622
KEY TO SWITCHING WAVEFORMS
Vcc / 0V
1V/ns
0.5Vcc
C
L
= 30pF+1TTL
C
L
= 100pF+1TTL
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Output Load
,
AC ELECTRICAL CHARACTERISTICS
( TA = -40
o
C to +85
o
C )
READ CYCLE
JEDEC
PARAMETER
PARAMETER
NAME
NAME
CYCLE TIME : 70ns CYCLE TIME : 55ns
MIN. TYP. MAX.
Vcc = 2.7~5.5V
DESCRIPTION
Read Cycle Time
Address Access Time
Chip Select Access Time
Chip Select Access Time
Data Byte Control Access Time
Output Enable to Output Valid
Chip Select to Output Low Z
(CE2,CE1)
(LB,UB)
(CE1)
(CE2)
(LB,UB)
MIN. TYP. MAX.
Vcc = 3.0~5.5V
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
AVAX
t
AVQV
t
ELQV
t
ELQV
t
BA
t
GLQV
t
ELQX
t
BE
t
GLQX
t
EHQZ
t
BDO
t
GHQZ
t
AXOX
t
RC
t
AA
t
ACS1
t
ACS2
t
BA
(1)
t
OE
t
CLZ
t
BE
t
OLZ
t
CHZ
t
BDO
t
OHZ
t
OH
70
--
--
--
--
--
10
5
5
--
--
--
10
--
--
--
--
--
--
--
--
--
--
--
--
--
--
70
70
70
35
35
--
--
--
35
35
30
--
55
--
--
--
--
--
10
5
5
--
--
--
10
--
--
--
--
--
--
--
--
--
--
--
--
--
--
55
55
55
30
30
--
--
--
30
30
25
--
Data Byte Control to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z (CE2,CE1)
Data Byte Control to Output High Z (LB,UB)
Output Disable to Output in High Z
Data Hold from Address Change
NOTE :
1. t
BA
is 35ns/30ns (@speed=70ns/55ns) with address toggle .
t
BA
is 70ns/55ns (@speed=70ns/55ns) without address toggle .
R0201-BS616LV1622
6
Revision 2.1
Jan.
2004
BSI [ BRILLIANCE SEMICONDUCTOR ]
