3/26/08
CS5560
±
2.5 V / 5 V, 50 kSps, 24-bit, High-throughput
∆Σ
ADC
Features
& Description
Differential Analog Input
On-chip Buffers for High Input Impedance
Conversion Time = 20
µS
Settles in One Conversion
Linearity Error = 0.0005%
Signal-to-Noise = 110 dB
24 Bits, No Missing Codes
Simple three/four-wire serial interface
Power Supply Configurations:
- Analog: +5 V / GND; IO: +1.8 V to +3.3 V
- Analog: ±2.5 V; IO: +1.8 V to +3.3 V
General Description
The CS5560 is a single-channel, 24-bit analog-to-digital
converter capable of 50 kSps conversion rate. The input
accepts a fully differential analog input signal. On-chip
buffers provide high input impedance for both the AIN in-
puts and the VREF+ input. This significantly reduces the
drive requirements of signal sources and reduces errors
due to source impedances. The CS5560 is a delta-sigma
converter capable of switching multiple input channels at
a high rate with no loss in throughput. The ADC uses a
low-latency digital filter architecture. The filter is designed
for fast settling and settles to full accuracy in one conver-
sion. The converter's 24-bit data output is in serial form,
with the serial port acting as either a master or a slave. The
converter is designed to support bipolar, ground-refer-
enced signals when operated from ±2.5V analog supplies.
The converter can operate from an analog supply of 0-5V
or from ±2.5V. The digital interface supports standard log-
ic operating from 1.8, 2.5, or 3.3 V.
Power Consumption:
- ADC Input Buffers On: 90 mW
- ADC Input Buffers Off: 60 mW
ORDERING INFORMATION:
See
V1+
V2+
VL
CS5560
VREF+
VREF-
CS
SMODE
ADC
AI N +
AI N-
DIGITAL
FILTER
LOGIC
SERIAL
INTERFACE
SCLK
SDO
RDY
SLEEP
BUFEN
RST
DIGITAL CONTROL
OSC/CLOCK
GENERATOR
CONV
BP/UP
MCLK
V1-
V2-
TST
DCR
VLR
VLR2
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright
©
Cirrus Logic, Inc. 2008
(All Rights Reserved)
MAR ‘08
DS713PP1
CIRRUS [ CIRRUS LOGIC ]
